fix(realm): make PCIe tests default for testing
This patch moves the PCIe DOE test to the default realm world
testsuite.
Also fixes some build issues and hardens the PCIe functions.
Note that FVP_Base_RevC model needs to have the following
options enabled for the PCIe tests to work :
-C pci.pcie_rc.ahci0.endpoint.doe_supported=1
-C pci.pcie_rc.ahci0.endpoint.ide_supported=1
Change-Id: Icfd6b68799b0bacb44299c6a3cf99a3c425f833d
Signed-off-by: Soby Mathew <soby.mathew@arm.com>
diff --git a/docs/porting/optional-mods.rst b/docs/porting/optional-mods.rst
index a88d682..7fc3813 100644
--- a/docs/porting/optional-mods.rst
+++ b/docs/porting/optional-mods.rst
@@ -50,6 +50,18 @@
generate a watchdog timeout interrupt. This interrupt remains deliberately
unserviced, which eventually asserts the reset signal.
+Function : plat_pcie_get_info_table()
+----------------------------
+
+::
+
+ Argument : void
+ Return : struct pcie_info_table *
+
+This function returns the pointer to `pcie_info_table` structure
+correponding to the platform. This needs to be implemented
+only if the platform want to run PCIe related tests.
+
--------------
*Copyright (c) 2019, Arm Limited. All rights reserved.*
diff --git a/include/lib/pcie/pcie.h b/include/lib/pcie/pcie.h
index aa3911f..3ce6986 100644
--- a/include/lib/pcie/pcie.h
+++ b/include/lib/pcie/pcie.h
@@ -11,6 +11,9 @@
#include <stdint.h>
#include <utils_def.h>
+/* platforms need to ensure that number of entries is less that this value */
+#define MAX_PCIE_INFO_ENTRIES 5
+
typedef struct {
unsigned long ecam_base; /* ECAM base address */
unsigned int segment_num; /* Segment number of this ECAM */
@@ -18,10 +21,10 @@
unsigned int end_bus_num; /* Last bus number */
} pcie_info_block_t;
-typedef struct {
+struct pcie_info_table{
unsigned int num_entries; /* Number of entries */
- pcie_info_block_t block[];
-} pcie_info_table_t;
+ pcie_info_block_t block[MAX_PCIE_INFO_ENTRIES];
+};
typedef struct {
uint32_t bdf;
diff --git a/include/plat/common/platform.h b/include/plat/common/platform.h
index c8b785c..1a51823 100644
--- a/include/plat/common/platform.h
+++ b/include/plat/common/platform.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2018-2019, Arm Limited. All rights reserved.
+ * Copyright (c) 2018-2024, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -193,4 +193,12 @@
return platform_get_core_pos(read_mpidr_el1() & MPID_MASK);
}
+/* Forward declaration */
+struct pcie_info_table;
+
+/*
+ * Retrieve platform PCIe information.
+ */
+const struct pcie_info_table *plat_pcie_get_info_table(void);
+
#endif /* __PLATFORM_H__ */
diff --git a/lib/pcie/pcie.c b/lib/pcie/pcie.c
index c3906d5..5f8c97f 100644
--- a/lib/pcie/pcie.c
+++ b/lib/pcie/pcie.c
@@ -11,13 +11,12 @@
#include <mmio.h>
#include <pcie.h>
#include <pcie_spec.h>
+#include <platform.h>
#include <tftf_lib.h>
-#include <platform_pcie.h>
-
#define PCIE_DEBUG VERBOSE
-const pcie_info_table_t *g_pcie_info_table;
+const struct pcie_info_table *g_pcie_info_table;
pcie_device_bdf_table_t *g_pcie_bdf_table;
pcie_device_bdf_table_t pcie_bdf_table[PCIE_DEVICE_BDF_TABLE_SZ];
@@ -256,6 +255,8 @@
return 1;
}
+ assert(g_pcie_bdf_table != NULL);
+
while (index < g_pcie_bdf_table->num_entries) {
*rp_bdf = g_pcie_bdf_table->device[index++].bdf;
@@ -294,6 +295,8 @@
uint32_t bdf, rp_bdf;
pcie_device_bdf_table_t *bdf_tbl_ptr = g_pcie_bdf_table;
+ assert(bdf_tbl_ptr != NULL);
+
for (unsigned int tbl_index = 0; tbl_index < bdf_tbl_ptr->num_entries;
tbl_index++) {
bdf = bdf_tbl_ptr->device[tbl_index].bdf;
@@ -317,6 +320,8 @@
*/
pcie_device_bdf_table_t *pcie_get_bdf_table(void)
{
+ assert(g_pcie_bdf_table != NULL);
+
return g_pcie_bdf_table;
}
@@ -336,6 +341,8 @@
assert(g_pcie_bdf_table != NULL);
g_pcie_bdf_table->num_entries = 0;
+
+ assert(g_pcie_info_table != NULL);
assert(g_pcie_info_table->num_entries != 0);
for (ecam_index = 0; ecam_index < g_pcie_info_table->num_entries; ecam_index++) {
@@ -420,6 +427,8 @@
uint32_t reg_value;
uintptr_t ecam_base = 0;
+ assert(g_pcie_info_table != NULL);
+
while (ecam_index < g_pcie_info_table->num_entries) {
/* Derive ECAM specific information */
const pcie_info_block_t *block = &g_pcie_info_table->block[ecam_index];
@@ -462,13 +471,15 @@
uint32_t ecam_index = 0;
uint32_t ecam_base, ecam_start_bus, ecam_end_bus;
pcie_device_bdf_table_t *bdf_tbl_ptr = g_pcie_bdf_table;
- uint32_t num_rciep = 0, num_rcec = 0;
- uint32_t num_iep = 0, num_irp = 0;
- uint32_t num_ep = 0, num_rp = 0;
- uint32_t num_dp = 0, num_up = 0;
- uint32_t num_pcie_pci = 0, num_pci_pcie = 0;
+ uint32_t num_rciep __unused = 0, num_rcec __unused = 0;
+ uint32_t num_iep __unused = 0, num_irp __unused = 0;
+ uint32_t num_ep __unused = 0, num_rp __unused = 0;
+ uint32_t num_dp __unused = 0, num_up __unused = 0;
+ uint32_t num_pcie_pci __unused = 0, num_pci_pcie __unused = 0;
uint32_t bdf_counter;
+ assert(bdf_tbl_ptr != NULL);
+
if (bdf_tbl_ptr->num_entries == 0) {
INFO("BDF Table: No RCiEP or iEP found\n");
return;
@@ -525,6 +536,8 @@
INFO("Number of PCI/PCIe Bridge: %u\n", num_pci_pcie);
INFO("Number of PCIe/PCI Bridge: %u\n", num_pcie_pci);
+ assert(g_pcie_info_table != NULL);
+
while (ecam_index < g_pcie_info_table->num_entries) {
/* Derive ECAM specific information */
@@ -540,7 +553,7 @@
while (tbl_index < bdf_tbl_ptr->num_entries) {
uint32_t seg_num, bus_num, dev_num, func_num;
- uint32_t device_id, vendor_id, reg_value;
+ uint32_t device_id __unused, vendor_id __unused, reg_value;
uint32_t bdf, dev_ecam_base;
bdf = bdf_tbl_ptr->device[tbl_index++].bdf;
@@ -588,12 +601,18 @@
INFO("Creating PCIe info table\n");
g_pcie_info_table = plat_pcie_get_info_table();
+ if (g_pcie_info_table == NULL) {
+ ERROR("PCIe info not returned by platform\n");
+ panic();
+ }
+
g_pcie_bdf_table = pcie_bdf_table;
num_ecam = g_pcie_info_table->num_entries;
INFO("Number of ECAM regions : %u\n", num_ecam);
- if (num_ecam == 0) {
- return;
+ if ((num_ecam == 0) || (num_ecam > MAX_PCIE_INFO_ENTRIES)) {
+ ERROR("PCIe info entries invalid\n");
+ panic();
}
pcie_create_device_bdf_table();
pcie_print_device_info();
diff --git a/plat/arm/fvp/fvp_pcie.c b/plat/arm/fvp/fvp_pcie.c
index 0569832..c43e42d 100644
--- a/plat/arm/fvp/fvp_pcie.c
+++ b/plat/arm/fvp/fvp_pcie.c
@@ -11,7 +11,7 @@
CASSERT(PLATFORM_NUM_ECAM != 0, PLATFORM_NUM_ECAM_is_zero);
-const pcie_info_table_t fvp_pcie_cfg = {
+const struct pcie_info_table fvp_pcie_cfg = {
.num_entries = PLATFORM_NUM_ECAM,
.block[0] = {
PLATFORM_PCIE_ECAM_BASE_ADDR_0,
@@ -21,7 +21,7 @@
}
};
-const pcie_info_table_t *plat_pcie_get_info_table(void)
+const struct pcie_info_table *plat_pcie_get_info_table(void)
{
return &fvp_pcie_cfg;
}
diff --git a/plat/arm/fvp/include/platform_pcie.h b/plat/arm/fvp/include/platform_pcie.h
index c76c7d9..4b3a0e9 100644
--- a/plat/arm/fvp/include/platform_pcie.h
+++ b/plat/arm/fvp/include/platform_pcie.h
@@ -19,6 +19,4 @@
#define PLATFORM_PCIE_START_BUS_NUM_0 0x0
#define PLATFORM_PCIE_END_BUS_NUM_0 0xFF
-const pcie_info_table_t *plat_pcie_get_info_table(void);
-
#endif /* PLATFORM_PCIE_H */
diff --git a/plat/arm/fvp/plat_setup.c b/plat/arm/fvp/plat_setup.c
index e6e4244..69cb0a1 100644
--- a/plat/arm/fvp/plat_setup.c
+++ b/plat/arm/fvp/plat_setup.c
@@ -35,9 +35,7 @@
#if USE_NVM
MAP_REGION_FLAT(FLASH_BASE, FLASH_SIZE, MT_DEVICE | MT_RW | MT_NS),
#endif
-#if USE_PCIE
MAP_REGION_FLAT(PCIE_CONFIG_BASE, PCIE_CONFIG_SIZE, MT_DEVICE | MT_RW | MT_NS),
-#endif
MAP_REGION_FLAT(DRAM_BASE, TFTF_BASE - DRAM_BASE, MT_MEMORY | MT_RW | MT_NS),
{0}
};
diff --git a/plat/arm/fvp/platform.mk b/plat/arm/fvp/platform.mk
index 7a2850f..ee30721 100644
--- a/plat/arm/fvp/platform.mk
+++ b/plat/arm/fvp/platform.mk
@@ -90,12 +90,8 @@
$(eval $(call add_define,TFTF_DEFINES,PA_SIZE))
$(eval $(call add_define,REALM_DEFINES,PA_SIZE))
-ifeq ($(TESTS),pcie-doe)
-USE_PCIE=1
-$(eval $(call add_define,TFTF_DEFINES,USE_PCIE))
-endif
-
-PLAT_INCLUDES += -Iplat/arm/fvp/include/
+PLAT_INCLUDES += -Iplat/arm/fvp/include/ \
+ -Iinclude/lib/pcie/
PLAT_SOURCES := drivers/arm/gic/arm_gic_v2v3.c \
drivers/arm/gic/gic_v2.c \
@@ -104,6 +100,7 @@
drivers/arm/timer/private_timer.c \
drivers/arm/timer/system_timer.c \
plat/arm/fvp/${ARCH}/plat_helpers.S \
+ plat/arm/fvp/fvp_pcie.c \
plat/arm/fvp/fvp_pwr_state.c \
plat/arm/fvp/fvp_topology.c \
plat/arm/fvp/fvp_mem_prot.c \
diff --git a/plat/common/plat_common.c b/plat/common/plat_common.c
index c43ae12..a4195c3 100644
--- a/plat/common/plat_common.c
+++ b/plat/common/plat_common.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2018-2020, Arm Limited. All rights reserved.
+ * Copyright (c) 2018-2024, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -24,6 +24,7 @@
#pragma weak tftf_plat_enable_mmu
#pragma weak tftf_plat_reset
#pragma weak plat_get_prot_regions
+#pragma weak plat_pcie_get_info_table
#if IMAGE_TFTF
@@ -148,3 +149,8 @@
*nelem = 0;
return NULL;
}
+
+const struct pcie_info_table *plat_pcie_get_info_table(void)
+{
+ return NULL;
+}
diff --git a/tftf/tests/doe_tests/doe_helpers.c b/tftf/tests/doe_tests/doe_helpers.c
index 28b6a86..911fbd0 100644
--- a/tftf/tests/doe_tests/doe_helpers.c
+++ b/tftf/tests/doe_tests/doe_helpers.c
@@ -13,12 +13,15 @@
#include <pcie_doe.h>
#include <spdm.h>
-#include <platform_pcie.h>
-
void pcie_init(void)
{
+ static bool is_init;
+
/* Create PCIe table and enumeration */
- pcie_create_info_table();
+ if (!is_init) {
+ pcie_create_info_table();
+ is_init = true;
+ }
}
/*
@@ -113,7 +116,7 @@
sizeof(ver_resp->version_number_entry_count));
while (entry_count-- != 0) {
- spdm_version_number_t ver = *ver_ptr++;
+ spdm_version_number_t ver __unused = *ver_ptr++;
INFO("SPDM v%llu.%llu.%llu.%llu\n",
EXTRACT(SPDM_VER_MAJOR, ver),
diff --git a/tftf/tests/doe_tests/doe_helpers.h b/tftf/tests/doe_tests/doe_helpers.h
index 08137e3..d0fc5c8 100644
--- a/tftf/tests/doe_tests/doe_helpers.h
+++ b/tftf/tests/doe_tests/doe_helpers.h
@@ -8,6 +8,8 @@
#ifndef DOE_HELPERS_H
#define DOE_HELPERS_H
+#include <stdint.h>
+
void pcie_init(void);
int find_doe_device(uint32_t *bdf_ptr, uint32_t *cap_base_ptr);
int doe_discovery(uint32_t bdf, uint32_t doe_cap_base);
diff --git a/tftf/tests/doe_tests/test_doe.c b/tftf/tests/doe_tests/test_doe.c
index 6eb5079..cc852fa 100644
--- a/tftf/tests/doe_tests/test_doe.c
+++ b/tftf/tests/doe_tests/test_doe.c
@@ -10,6 +10,13 @@
#define SKIP_TEST_IF_DOE_NOT_SUPPORTED() \
do { \
+ /* Test PCIe DOE only for RME */ \
+ if (!get_armv9_2_feat_rme_support()) { \
+ tftf_testcase_printf("FEAT_RME not supported\n"); \
+ return TEST_RESULT_SKIPPED; \
+ } \
+ \
+ pcie_init(); \
if (find_doe_device(&bdf, &doe_cap_base) != 0) { \
tftf_testcase_printf("PCIe DOE not supported\n"); \
return TEST_RESULT_SKIPPED; \
@@ -21,8 +28,6 @@
uint32_t bdf, doe_cap_base;
int ret;
- pcie_init();
-
SKIP_TEST_IF_DOE_NOT_SUPPORTED();
ret = doe_discovery(bdf, doe_cap_base);
diff --git a/tftf/tests/runtime_services/realm_payload/host_realm_simd_common.h b/tftf/tests/runtime_services/realm_payload/host_realm_simd_common.h
index 377c85b..6ab45c3 100644
--- a/tftf/tests/runtime_services/realm_payload/host_realm_simd_common.h
+++ b/tftf/tests/runtime_services/realm_payload/host_realm_simd_common.h
@@ -4,7 +4,7 @@
*/
#ifndef HOST_REALM_COMMON_H
-#define HOST_REALM_COMMON_h
+#define HOST_REALM_COMMON_H
#define NS_NORMAL_SVE 0x1U
#define NS_STREAMING_SVE 0x2U
diff --git a/tftf/tests/tests-pcie-doe.mk b/tftf/tests/tests-pcie-doe.mk
deleted file mode 100644
index 14bc9cf..0000000
--- a/tftf/tests/tests-pcie-doe.mk
+++ /dev/null
@@ -1,22 +0,0 @@
-#
-# Copyright (c) 2024, Arm Limited. All rights reserved.
-#
-# SPDX-License-Identifier: BSD-3-Clause
-#
-
-TESTS_SOURCES += \
- $(addprefix plat/arm/fvp/, \
- fvp_pcie.c \
- )
-
-TESTS_SOURCES += \
- $(addprefix tftf/tests/doe_tests/, \
- doe_helpers.c \
- test_doe.c \
- )
-
-TESTS_SOURCES += \
- $(addprefix lib/pcie/, \
- pcie.c \
- pcie_doe.c \
- )
diff --git a/tftf/tests/tests-pcie-doe.xml b/tftf/tests/tests-pcie-doe.xml
deleted file mode 100644
index ed8b7cb..0000000
--- a/tftf/tests/tests-pcie-doe.xml
+++ /dev/null
@@ -1,14 +0,0 @@
-<?xml version="1.0" encoding="utf-8"?>
-
-<!--
- Copyright (c) 2024, Arm Limited. All rights reserved.
-
- SPDX-License-Identifier: BSD-3-Clause
--->
-
-<testsuites>
- <testsuite name="PCI Data Object Exchange" description="Check PCI DOE support">
- <testcase name="PCI DOE Discovery" function="doe_discovery_test" />
- <testcase name="SPDM Get Version" function="spdm_version_test" />
- </testsuite>
-</testsuites>
diff --git a/tftf/tests/tests-realm-payload.mk b/tftf/tests/tests-realm-payload.mk
index ae4b20a..4da8e3e 100644
--- a/tftf/tests/tests-realm-payload.mk
+++ b/tftf/tests/tests-realm-payload.mk
@@ -1,5 +1,5 @@
#
-# Copyright (c) 2021-2023, Arm Limited. All rights reserved.
+# Copyright (c) 2021-2024, Arm Limited. All rights reserved.
#
# SPDX-License-Identifier: BSD-3-Clause
#
@@ -44,4 +44,16 @@
$(addprefix lib/extensions/fpu/, \
fpu.c \
)
+
+TESTS_SOURCES += \
+ $(addprefix tftf/tests/doe_tests/, \
+ doe_helpers.c \
+ test_doe.c \
+ )
+
+TESTS_SOURCES += \
+ $(addprefix lib/pcie/, \
+ pcie.c \
+ pcie_doe.c \
+ )
endif
diff --git a/tftf/tests/tests-realm-payload.xml b/tftf/tests/tests-realm-payload.xml
index 36fc52b..d95c474 100644
--- a/tftf/tests/tests-realm-payload.xml
+++ b/tftf/tests/tests-realm-payload.xml
@@ -1,7 +1,7 @@
<?xml version="1.0" encoding="utf-8"?>
<!--
- Copyright (c) 2021-2023, Arm Limited. All rights reserved.
+ Copyright (c) 2021-2024, Arm Limited. All rights reserved.
SPDX-License-Identifier: BSD-3-Clause
-->
@@ -132,5 +132,10 @@
<testcase name="Test realm attestation" function="host_realm_test_attestation" />
<testcase name="Test realm attestation fault"
function="host_realm_test_attestation_fault" />
+ <!-- Test case related to PCIE-DOE -->
+ <testcase name="PCI DOE Discovery"
+ function="doe_discovery_test" />
+ <testcase name="SPDM Get Version"
+ function="spdm_version_test" />
</testsuite>
</testsuites>