Michal Simek | 8ba06f3 | 2024-01-22 12:14:24 +0100 | [diff] [blame] | 1 | Platform Ports |
| 2 | ============== |
| 3 | |
| 4 | .. toctree:: |
| 5 | :maxdepth: 1 |
| 6 | :caption: Contents |
| 7 | :hidden: |
| 8 | |
Maheedhar Bollapalli | 951376b | 2024-10-04 03:43:07 +0000 | [diff] [blame] | 9 | xilinx-versal2 |
Michal Simek | 8ba06f3 | 2024-01-22 12:14:24 +0100 | [diff] [blame] | 10 | xilinx-versal_net |
| 11 | xilinx-versal |
Amit Nagal | ef77a09 | 2024-02-15 12:53:46 +0530 | [diff] [blame] | 12 | xilinx-zynqmp |
Michal Simek | 8ba06f3 | 2024-01-22 12:14:24 +0100 | [diff] [blame] | 13 | |
| 14 | This section provides a list of supported upstream *platform ports* and the |
| 15 | documentation associated with them. |
| 16 | |
| 17 | -------------- |
| 18 | |
| 19 | *Copyright (c) 2024, Arm Limited. All rights reserved.* |