blob: 27db8b11ca53e79f45d158ef2dada869eaa7a4d5 [file] [log] [blame]
Igor Podgainõid1a7f4d2024-11-26 12:50:47 +01001/*
2 * Copyright (c) 2024, Arm Limited. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#include <asm_macros.S>
8
9#if __aarch64__
10
11 .globl read128_par_el1
12 .globl read128_ttbr0_el1
13 .globl read128_ttbr1_el1
14 .globl read128_ttbr0_el2
15 .globl read128_ttbr1_el2
16 .globl read128_vttbr_el2
17 .globl read128_rcwmask_el1
18 .globl read128_rcwsmask_el1
19 .globl write128_par_el1
20 .globl write128_ttbr0_el1
21 .globl write128_ttbr1_el1
22 .globl write128_ttbr0_el2
23 .globl write128_ttbr1_el2
24 .globl write128_vttbr_el2
25 .globl write128_rcwmask_el1
26 .globl write128_rcwsmask_el1
27
28func read128_par_el1 /* MRRS x0, x1, S3_0_C7_C4_0 */
29 .inst 0xD5787400
30 ret
31endfunc read128_par_el1
32
33func read128_ttbr0_el1 /* MRRS x0, x1, S3_0_C2_C0_0 */
34 .inst 0xD5782000
35 ret
36endfunc read128_ttbr0_el1
37
38func read128_ttbr1_el1 /* MRRS x0, x1, S3_0_C2_C0_1 */
39 .inst 0xD5782020
40 ret
41endfunc read128_ttbr1_el1
42
43func read128_ttbr0_el2 /* MRRS x0, x1, S3_4_C2_C0_0 */
44 .inst 0xD57C2000
45 ret
46endfunc read128_ttbr0_el2
47
48func read128_ttbr1_el2 /* MRRS x0, x1, S3_4_C2_C0_1 */
49 .inst 0xD57C2020
50 ret
51endfunc read128_ttbr1_el2
52
53func read128_vttbr_el2 /* MRRS x0, x1, S3_4_C2_C1_0 */
54 .inst 0xD57C2100
55 ret
56endfunc read128_vttbr_el2
57
58func read128_rcwmask_el1 /* MRRS x0, x1, S3_0_C13_C0_6 */
59 .inst 0xD578D0C0
60 ret
61endfunc read128_rcwmask_el1
62
63func read128_rcwsmask_el1 /* MRRS x0, x1, S3_0_C13_C0_3 */
64 .inst 0xD578D060
65 ret
66endfunc read128_rcwsmask_el1
67
68func write128_par_el1 /* MSRR S3_0_C7_C4_0, x0, x1 */
69 .inst 0xD5587400
70 ret
71endfunc write128_par_el1
72
73func write128_ttbr0_el1 /* MSRR S3_0_C2_C0_0, x0, x1 */
74 .inst 0xD5582000
75 ret
76endfunc write128_ttbr0_el1
77
78func write128_ttbr1_el1 /* MSRR S3_0_C2_C0_1, x0, x1 */
79 .inst 0xD5582020
80 ret
81endfunc write128_ttbr1_el1
82
83func write128_ttbr0_el2 /* MSRR S3_4_C2_C0_0, x0, x1 */
84 .inst 0xD55C2000
85 ret
86endfunc write128_ttbr0_el2
87
88func write128_ttbr1_el2 /* MSRR S3_4_C2_C0_1, x0, x1 */
89 .inst 0xD55C2020
90 ret
91endfunc write128_ttbr1_el2
92
93func write128_vttbr_el2 /* MSRR S3_4_C2_C1_0, x0, x1 */
94 .inst 0xD55C2100
95 ret
96endfunc write128_vttbr_el2
97
98func write128_rcwmask_el1 /* MSRR S3_0_C13_C0_6, x0, x1 */
99 .inst 0xD558D0C0
100 ret
101endfunc write128_rcwmask_el1
102
103func write128_rcwsmask_el1 /* MSRR S3_0_C13_C0_3, x0, x1 */
104 .inst 0xD558D060
105 ret
106endfunc write128_rcwsmask_el1
107
108#endif /* __aarch64__ */