tree 0f6584cdf1da166a75c542d0b58a9d4711bb579a
parent f4a2bb986b43fcb1c0c8c45b5d9a93798f655453
author Patrick Delaunay <patrick.delaunay@foss.st.com> 1716365059 +0200
committer Yann Gautier <yann.gautier@st.com> 1718099138 +0200

fix(st-clock): display proper PLL number for STM32MP13

The PLL clk_id does not start at 0, but it is in the enum listing all
clocks. To have a better display of the PLL number, start at PLL1,
by changing pll->clk_id in messages with pll->clk_id - _CK_PLL1 + 1.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: Ic09195ae6fe5f8d3a87e69962425f7c826f3670b