| commit | 09330a49376306031cf92e26bbd6955ebfe87597 | [log] [tgz] |
|---|---|---|
| author | Sieu Mun Tang <sieu.mun.tang@intel.com> | Tue Apr 30 16:10:15 2024 +0800 |
| committer | jit.loon.lim <jit.loon.lim@intel.com> | Wed Sep 25 21:45:17 2024 +0200 |
| tree | d513d7ebdc22e2c02ac447ed58802ecd35d8568d | |
| parent | e6f7929d12b5ac1950e59bf26e7042eab4ddb3bd [diff] |
fix(intel): update CCU configuration for Agilex5 platform Update CCU configuration for DSU, FPGA2SOC, GIC_M, SMMU, PSS NOC, DCE0, DCE1,DMI0, DMI1, L4 peripheral firewall, L4 system firewall, LWSOC2FPGA, SOCFPGA and TCU. Change-Id: Id416d58b0115098b99a8dfdccb28a7d6f6747f75 Signed-off-by: Girisha Dengi <girisha.dengi@intel.com> Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>