amlogic: Fix prefixes in the PM code
Remove the GXBB prefix from the code in the common directory and add
SoC-specific prefixes in the SoC specific code.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: Ic983ef70b0ef23f95088dd8df488d8c42c3bc030
diff --git a/plat/amlogic/gxbb/gxbb_def.h b/plat/amlogic/gxbb/gxbb_def.h
index b9183a4..27bc0ad 100644
--- a/plat/amlogic/gxbb/gxbb_def.h
+++ b/plat/amlogic/gxbb/gxbb_def.h
@@ -44,7 +44,7 @@
/* Mailboxes */
#define AML_MHU_SECURE_SCP_TO_AP_PAYLOAD UL(0xD9013800)
#define AML_MHU_SECURE_AP_TO_SCP_PAYLOAD UL(0xD9013A00)
-#define GXBB_PSCI_MAILBOX_BASE UL(0xD9013F00)
+#define AML_PSCI_MAILBOX_BASE UL(0xD9013F00)
#define GXBB_TZROM_BASE UL(0xD9040000)
#define GXBB_TZROM_SIZE UL(0x00010000)
@@ -86,7 +86,7 @@
#define GXBB_SYS_CPU_CFG7 UL(0xC8834664)
-#define GXBB_AO_RTI_STATUS_REG3 UL(0xDA10001C)
+#define AML_AO_RTI_STATUS_REG3 UL(0xDA10001C)
#define AML_HIU_MAILBOX_SET_0 UL(0xDA83C404)
#define AML_HIU_MAILBOX_STAT_0 UL(0xDA83C408)
diff --git a/plat/amlogic/gxbb/gxbb_pm.c b/plat/amlogic/gxbb/gxbb_pm.c
index 20f655a..ed57fee 100644
--- a/plat/amlogic/gxbb/gxbb_pm.c
+++ b/plat/amlogic/gxbb/gxbb_pm.c
@@ -32,7 +32,7 @@
static void gxbb_program_mailbox(u_register_t mpidr, uint64_t value)
{
unsigned int core = plat_calc_core_pos(mpidr);
- uintptr_t cpu_mailbox_addr = GXBB_PSCI_MAILBOX_BASE + (core << 4);
+ uintptr_t cpu_mailbox_addr = AML_PSCI_MAILBOX_BASE + (core << 4);
mmio_write_64(cpu_mailbox_addr, value);
flush_dcache_range(cpu_mailbox_addr, sizeof(uint64_t));
@@ -42,7 +42,7 @@
{
INFO("BL31: PSCI_SYSTEM_RESET\n");
- uint32_t status = mmio_read_32(GXBB_AO_RTI_STATUS_REG3);
+ uint32_t status = mmio_read_32(AML_AO_RTI_STATUS_REG3);
NOTICE("BL31: Reboot reason: 0x%x\n", status);
@@ -50,7 +50,7 @@
console_flush();
- mmio_write_32(GXBB_AO_RTI_STATUS_REG3, status);
+ mmio_write_32(AML_AO_RTI_STATUS_REG3, status);
int ret = aml_scpi_sys_power_state(SCPI_SYSTEM_REBOOT);
@@ -133,7 +133,7 @@
{
u_register_t mpidr = read_mpidr_el1();
unsigned int core = plat_calc_core_pos(mpidr);
- uintptr_t addr = GXBB_PSCI_MAILBOX_BASE + 8 + (core << 4);
+ uintptr_t addr = AML_PSCI_MAILBOX_BASE + 8 + (core << 4);
mmio_write_32(addr, 0xFFFFFFFF);
flush_dcache_range(addr, sizeof(uint32_t));