| commit | 18adb4efa42946252b489d02f06cccb61ad0c867 | [log] [tgz] |
|---|---|---|
| author | Jit Loon Lim <jit.loon.lim@intel.com> | Wed May 17 12:26:11 2023 +0800 |
| committer | Jit Loon Lim <jit.loon.lim@intel.com> | Wed Jul 05 09:08:24 2023 +0800 |
| tree | f6dc024ebbcfe53490c3c55a0e1ee3ea33d4ef99 | |
| parent | 1b1a3eb1edff99b49bb40ad4172073d04a230938 [diff] |
feat(intel): memory controller support for Agilex5 SoC FPGA This patch is used to enable memory controller support for Agilex5 SoC FPGA. 1. Added memory controller support. 2. Updated product name -> Agilex5 Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com> Change-Id: I8381b82eeed939b970a7410a6181a514f2c90caa