diff --git a/plat/st/stm32mp1/stm32mp1_dbgmcu.c b/plat/st/stm32mp1/stm32mp1_dbgmcu.c
index 90323ac..1826783 100644
--- a/plat/st/stm32mp1/stm32mp1_dbgmcu.c
+++ b/plat/st/stm32mp1/stm32mp1_dbgmcu.c
@@ -18,28 +18,16 @@
 #include <stm32mp1_dbgmcu.h>
 
 #define DBGMCU_IDC		U(0x00)
-#define DBGMCU_APB4FZ1		U(0x2C)
 
 #define DBGMCU_IDC_DEV_ID_MASK	GENMASK(11, 0)
 #define DBGMCU_IDC_REV_ID_MASK	GENMASK(31, 16)
 #define DBGMCU_IDC_REV_ID_SHIFT	16
 
-#define DBGMCU_APB4FZ1_IWDG2	BIT(2)
-
 static int stm32mp1_dbgmcu_init(void)
 {
-	uint32_t dbg_conf;
-
-	dbg_conf = bsec_read_debug_conf();
-
-	if ((dbg_conf & BSEC_DBGSWGEN) == 0U) {
-		uint32_t result = bsec_write_debug_conf(dbg_conf |
-							BSEC_DBGSWGEN);
-
-		if (result != BSEC_OK) {
-			ERROR("Error enabling DBGSWGEN\n");
-			return -1;
-		}
+	if ((bsec_read_debug_conf() & BSEC_DBGSWGEN) == 0U) {
+		INFO("Software access to all debug components is disabled\n");
+		return -1;
 	}
 
 	mmio_setbits_32(RCC_BASE + RCC_DBGCFGR, RCC_DBGCFGR_DBGCKEN);
@@ -84,25 +72,3 @@
 
 	return 0;
 }
-
-/*
- * @brief  Freeze IWDG2 in debug mode.
- * @retval None.
- */
-int stm32mp1_dbgmcu_freeze_iwdg2(void)
-{
-	uint32_t dbg_conf;
-
-	if (stm32mp1_dbgmcu_init() != 0) {
-		return -EPERM;
-	}
-
-	dbg_conf = bsec_read_debug_conf();
-
-	if ((dbg_conf & (BSEC_SPIDEN | BSEC_SPINDEN)) != 0U) {
-		mmio_setbits_32(DBGMCU_BASE + DBGMCU_APB4FZ1,
-				DBGMCU_APB4FZ1_IWDG2);
-	}
-
-	return 0;
-}