| commit | cf82aff09801e3f66dc355faa434dae83e031cba | [log] [tgz] |
|---|---|---|
| author | Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com> | Tue Oct 22 13:39:14 2019 +0800 |
| committer | Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com> | Tue Dec 17 12:54:34 2019 +0800 |
| tree | 5f6575d0816359f7cf3508c1a2bbdece2b10fbf1 | |
| parent | 2db1e7663db8f94986bea02ade171693abfbdee6 [diff] |
intel: Modify BL31 address mapping Load BL31 to DDR instead of On-Chip RAM for scalability. Also, make use of On-Chip RAM for BL31 specific variables filling down from handoff offset to reduce fragmentation Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com> Change-Id: Ib64f48bd14f71e5fca2d406f4ede3386f2881099