commit 2db1e7663db8f94986bea02ade171693abfbdee6
author Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com> Tue Oct 22 12:59:32 2019 +0800
committer Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com> Tue Dec 17 12:54:29 2019 +0800
tree 1d9ac4d324c62b7668fd7d34249887fceb8042ca
parent b1acebf4fb6a08190dc8436f97078e1088ad852d

intel: stratix10: Enable uboot entrypoint support

This patch will provide an entrypoint for uboot's spl into BL31.
BL31 will also handle secondary cpu state during uboot's cold boot

Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: I661bdb782c2d793d5fc3c7f78dd7ff746e33b7a3

plat/intel/soc/common/include/socfpga_private.h

diff --git a/plat/intel/soc/common/include/socfpga_private.h b/plat/intel/soc/common/include/socfpga_private.h
index 3754844..ca38f62 100644
--- a/plat/intel/soc/common/include/socfpga_private.h
+++ b/plat/intel/soc/common/include/socfpga_private.h
@@ -61,5 +61,6 @@
 
 unsigned long socfpga_get_ns_image_entrypoint(void);
 
+void plat_secondary_cpus_bl31_entry(void);
 
 #endif /* SOCFPGA_PRIVATE_H */