diff --git a/lib/extensions/amu/aarch64/amu.c b/lib/extensions/amu/aarch64/amu.c
index 129616e..6bed6c3 100644
--- a/lib/extensions/amu/aarch64/amu.c
+++ b/lib/extensions/amu/aarch64/amu.c
@@ -163,30 +163,6 @@
 		return;
 	}
 
-#if ENABLE_AMU_AUXILIARY_COUNTERS
-	if (AMU_GROUP1_NR_COUNTERS > 0U) {
-		/* Check and set presence of group 1 counters */
-		if (!amu_group1_supported()) {
-			ERROR("AMU Counter Group 1 is not implemented\n");
-			panic();
-		}
-
-		/* Check number of group 1 counters */
-		uint64_t cnt_num = read_amcgcr_el0_cg1nc();
-
-		VERBOSE("%s%llu. %s%u\n",
-			"Number of AMU Group 1 Counters ", cnt_num,
-			"Requested number ", AMU_GROUP1_NR_COUNTERS);
-
-		if (cnt_num < AMU_GROUP1_NR_COUNTERS) {
-			ERROR("%s%llu is less than %s%u\n",
-			"Number of AMU Group 1 Counters ", cnt_num,
-			"Requested number ", AMU_GROUP1_NR_COUNTERS);
-			panic();
-		}
-	}
-#endif
-
 	if (el2_unused) {
 		/*
 		 * CPTR_EL2.TAM: Set to zero so any accesses to
@@ -206,7 +182,7 @@
 	write_amcntenset0_el0_px((UINT64_C(1) << read_amcgcr_el0_cg0nc()) - 1U);
 
 #if ENABLE_AMU_AUXILIARY_COUNTERS
-	if (AMU_GROUP1_NR_COUNTERS > 0U) {
+	if (amu_group1_supported()) {
 		/* Enable group 1 counters */
 		write_amcntenset1_el0_px(AMU_GROUP1_COUNTERS_MASK);
 	}
@@ -293,7 +269,7 @@
 {
 	assert(amu_supported());
 	assert(amu_group1_supported());
-	assert(idx < AMU_GROUP1_NR_COUNTERS);
+	assert(idx < read_amcgcr_el0_cg1nc());
 
 	return amu_group1_cnt_read_internal(idx);
 }
@@ -303,7 +279,7 @@
 {
 	assert(amu_supported());
 	assert(amu_group1_supported());
-	assert(idx < AMU_GROUP1_NR_COUNTERS);
+	assert(idx < read_amcgcr_el0_cg1nc());
 
 	amu_group1_cnt_write_internal(idx, val);
 	isb();
@@ -318,7 +294,7 @@
 {
 	assert(amu_v1p1_supported());
 	assert(amu_group1_supported());
-	assert(idx < AMU_GROUP1_NR_COUNTERS);
+	assert(idx < read_amcgcr_el0_cg1nc());
 	assert((read_amcg1idr_el0_voff() & (UINT64_C(1) << idx)) != 0U);
 
 	return amu_group1_voffset_read_internal(idx);
@@ -333,7 +309,7 @@
 {
 	assert(amu_v1p1_supported());
 	assert(amu_group1_supported());
-	assert(idx < AMU_GROUP1_NR_COUNTERS);
+	assert(idx < read_amcgcr_el0_cg1nc());
 	assert((read_amcg1idr_el0_voff() & (UINT64_C(1) << idx)) != 0U);
 
 	amu_group1_voffset_write_internal(idx, val);
@@ -350,20 +326,12 @@
 		return (void *)-1;
 	}
 
-#if ENABLE_AMU_AUXILIARY_COUNTERS
-	if (AMU_GROUP1_NR_COUNTERS > 0U) {
-		if (!amu_group1_supported()) {
-			return (void *)-1;
-		}
-	}
-#endif
-
 	/* Assert that group 0/1 counter configuration is what we expect */
 	assert(read_amcntenset0_el0_px() ==
 		((UINT64_C(1) << read_amcgcr_el0_cg0nc()) - 1U));
 
 #if ENABLE_AMU_AUXILIARY_COUNTERS
-	if (AMU_GROUP1_NR_COUNTERS > 0U) {
+	if (amu_group1_supported()) {
 		assert(read_amcntenset1_el0_px() == AMU_GROUP1_COUNTERS_MASK);
 	}
 #endif
@@ -375,7 +343,7 @@
 	write_amcntenclr0_el0_px((UINT64_C(1) << read_amcgcr_el0_cg0nc()) - 1U);
 
 #if ENABLE_AMU_AUXILIARY_COUNTERS
-	if (AMU_GROUP1_NR_COUNTERS > 0U) {
+	if (amu_group1_supported()) {
 		write_amcntenclr1_el0_px(AMU_GROUP1_COUNTERS_MASK);
 	}
 #endif
@@ -396,9 +364,9 @@
 	}
 
 #if ENABLE_AMU_AUXILIARY_COUNTERS
-	if (AMU_GROUP1_NR_COUNTERS > 0U) {
+	if (amu_group1_supported()) {
 		/* Save group 1 counters */
-		for (i = 0U; i < AMU_GROUP1_NR_COUNTERS; i++) {
+		for (i = 0U; i < read_amcgcr_el0_cg1nc(); i++) {
 			if ((AMU_GROUP1_COUNTERS_MASK & (1UL << i)) != 0U) {
 				ctx->group1_cnts[i] = amu_group1_cnt_read(i);
 			}
@@ -409,7 +377,7 @@
 			uint64_t amcg1idr = read_amcg1idr_el0_voff() &
 				AMU_GROUP1_COUNTERS_MASK;
 
-			for (i = 0U; i < AMU_GROUP1_NR_COUNTERS; i++) {
+			for (i = 0U; i < read_amcgcr_el0_cg1nc(); i++) {
 				if (((amcg1idr >> i) & 1ULL) != 0ULL) {
 					ctx->group1_voffsets[i] =
 						amu_group1_voffset_read(i);
@@ -431,19 +399,11 @@
 		return (void *)-1;
 	}
 
-#if ENABLE_AMU_AUXILIARY_COUNTERS
-	if (AMU_GROUP1_NR_COUNTERS > 0U) {
-		if (!amu_group1_supported()) {
-			return (void *)-1;
-		}
-	}
-#endif
-
 	/* Counters were disabled in `amu_context_save()` */
 	assert(read_amcntenset0_el0_px() == 0U);
 
 #if ENABLE_AMU_AUXILIARY_COUNTERS
-	if (AMU_GROUP1_NR_COUNTERS > 0U) {
+	if (amu_group1_supported()) {
 		assert(read_amcntenset1_el0_px() == 0U);
 	}
 #endif
@@ -465,9 +425,9 @@
 	write_amcntenset0_el0_px((UINT64_C(1) << read_amcgcr_el0_cg0nc()) - 1U);
 
 #if ENABLE_AMU_AUXILIARY_COUNTERS
-	if (AMU_GROUP1_NR_COUNTERS > 0U) {
+	if (amu_group1_supported()) {
 		/* Restore group 1 counters */
-		for (i = 0U; i < AMU_GROUP1_NR_COUNTERS; i++) {
+		for (i = 0U; i < read_amcgcr_el0_cg1nc(); i++) {
 			if ((AMU_GROUP1_COUNTERS_MASK & (1UL << i)) != 0U) {
 				amu_group1_cnt_write(i, ctx->group1_cnts[i]);
 			}
@@ -478,7 +438,7 @@
 			uint64_t amcg1idr = read_amcg1idr_el0_voff() &
 				AMU_GROUP1_COUNTERS_MASK;
 
-			for (i = 0U; i < AMU_GROUP1_NR_COUNTERS; i++) {
+			for (i = 0U; i < read_amcgcr_el0_cg1nc(); i++) {
 				if (((amcg1idr >> i) & 1ULL) != 0ULL) {
 					amu_group1_voffset_write(i,
 						ctx->group1_voffsets[i]);