layerscape: Initial TF-A support for LS1043ardb
This patch introduce TF-A support for NXP's ls1043a platform.
more details information of ls1043a chip and ls1043ardb board
can be found at docs/plat/ls1043a.rst.
Boot sequence on ls1043a is: bootrom loads bl1 firstly, then bl1
loads bl2, bl2 will load bl31, bl32 and bl33, bl31 will boot
bl32(tee os) and bl33(u-boot or uefi), bl33 boot Linux kernel.
Now TF-A on ls1043ardb platform has the following features in this patch:
* Support boot from Nor flash.
* TF-A can boot bl33 which runs in el2 of non-secure world.
* TF-A boot OPTee OS.
* Support PSCI
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Signed-off-by: Chenyin.Ha <Chenyin.Ha@nxp.com>
Signed-off-by: Chenhui Zhao <chenhui.zhao@nxp.com>
Signed-off-by: jiaheng.fan <jiaheng.fan@nxp.com>
Signed-off-by: Wen He <wen.he_1@nxp.com>
diff --git a/plat/layerscape/board/ls1043/platform.mk b/plat/layerscape/board/ls1043/platform.mk
new file mode 100644
index 0000000..163d25e
--- /dev/null
+++ b/plat/layerscape/board/ls1043/platform.mk
@@ -0,0 +1,80 @@
+#
+# Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-3-Clause
+#
+
+# indicate the reset vector address can be programmed
+PROGRAMMABLE_RESET_ADDRESS := 1
+USE_COHERENT_MEM := 0
+RESET_TO_BL31 := 0
+ENABLE_STACK_PROTECTOR := 0
+LS1043_GIC_SOURCES := drivers/arm/gic/common/gic_common.c \
+ drivers/arm/gic/v2/gicv2_main.c \
+ drivers/arm/gic/v2/gicv2_helpers.c \
+ plat/common/plat_gicv2.c \
+ plat/layerscape/board/ls1043/ls_gic.c
+
+
+LS1043_INTERCONNECT_SOURCES := drivers/arm/cci/cci.c
+
+LS1043_SECURITY_SOURCES := plat/layerscape/common/ls_tzc380.c \
+ plat/layerscape/board/ls1043/ls1043_security.c
+
+PLAT_INCLUDES := -Iplat/layerscape/board/ls1043/include \
+ -Iinclude/plat/arm/common \
+ -Iplat/layerscape/common/include \
+ -Iinclude/drivers/arm \
+ -Iinclude/lib \
+ -Iinclude/drivers/io
+
+
+PLAT_BL_COMMON_SOURCES := drivers/console/aarch64/console.S \
+ plat/layerscape/common/aarch64/ls_console.S
+
+LS1043_CPU_LIBS := lib/cpus/${ARCH}/aem_generic.S
+
+LS1043_CPU_LIBS += lib/cpus/aarch64/cortex_a53.S
+
+BL1_SOURCES += plat/layerscape/board/ls1043/ls1043_bl1_setup.c \
+ plat/layerscape/board/ls1043/ls1043_err.c \
+ drivers/delay_timer/delay_timer.c \
+
+BL1_SOURCES += plat/layerscape/board/ls1043/${ARCH}/ls1043_helpers.S \
+ ${LS1043_CPU_LIBS} \
+ ${LS1043_INTERCONNECT_SOURCES} \
+ $(LS1043_SECURITY_SOURCES)
+
+
+BL2_SOURCES += drivers/delay_timer/delay_timer.c \
+ plat/layerscape/board/ls1043/ls1043_bl2_setup.c \
+ plat/layerscape/board/ls1043/ls1043_err.c \
+ ${LS1043_SECURITY_SOURCES}
+
+
+BL31_SOURCES += plat/layerscape/board/ls1043/ls1043_bl31_setup.c \
+ plat/layerscape/board/ls1043/ls1043_topology.c \
+ plat/layerscape/board/ls1043/aarch64/ls1043_helpers.S \
+ plat/layerscape/board/ls1043/ls1043_psci.c \
+ drivers/delay_timer/delay_timer.c \
+ ${LS1043_CPU_LIBS} \
+ ${LS1043_GIC_SOURCES} \
+ ${LS1043_INTERCONNECT_SOURCES} \
+ ${LS1043_SECURITY_SOURCES}
+
+# Disable the PSCI platform compatibility layer
+ENABLE_PLAT_COMPAT := 0
+MULTI_CONSOLE_API := 1
+
+# Enable workarounds for selected Cortex-A53 erratas.
+ERRATA_A53_855873 := 1
+
+ifneq (${ENABLE_STACK_PROTECTOR},0)
+PLAT_BL_COMMON_SOURCES += plat/layerscape/board/ls1043/ls1043_stack_protector.c
+endif
+
+ifeq (${ARCH},aarch32)
+ NEED_BL32 := yes
+endif
+
+include plat/layerscape/common/ls_common.mk