tree 27776d2f039d7c84b3f6f540b0aa4f01f2986cef
parent 0623183af10a1c8f9d2888a5932aae447b7a7f7b
author Tanmay Kathpalia <tanmay.kathpalia@intel.com> 1717152022 +0000
committer jit.loon.lim <jit.loon.lim@intel.com> 1727115081 +0200

fix(intel): add cache invalidation during BL31 initialization

During warm boot, the data cache is invalidated before
enabling them in u-boot proper, this cache
invalidation (+ cleaning) leads to the sync-up of stale
values in the cache to be synced with the main memory.
So, before the cache cleaning is done in u-boot proper,
it is invalidated in BL31 so that the cache data gets in
sync with u-boot proper memory address space and when
u-boot proper does its initialization which in turn clears
its BSS and heap section.

Change-Id: Ic8d8672f1e371868be7f54f5a1fae9229ab15164
Signed-off-by: Tanmay Kathpalia <tanmay.kathpalia@intel.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>