commit 40daecc1be51383c806c0ac953303e47026abcac
author Antonio Nino Diaz <antonio.ninodiaz@arm.com> Thu Oct 25 16:52:26 2018 +0100
committer Antonio Nino Diaz <antonio.ninodiaz@arm.com> Mon Oct 29 14:41:48 2018 +0000
tree 62f705b7a8c4e21c3d6cafeead88165f364ce34b
parent 4012531547f63595f33e493dcd7ebd1730dfcedc

Fix MISRA defects in extension libs

No functional changes.

Change-Id: I2f28f20944f552447ac4e9e755493cd7c0ea1192
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

lib/cpus/aarch64/cpuamu_helpers.S

diff --git a/lib/cpus/aarch64/cpuamu_helpers.S b/lib/cpus/aarch64/cpuamu_helpers.S
index 8965d6d..79b7288 100644
--- a/lib/cpus/aarch64/cpuamu_helpers.S
+++ b/lib/cpus/aarch64/cpuamu_helpers.S
@@ -16,7 +16,7 @@
 	.globl	cpuamu_write_cpuamcntenclr_el0
 
 /*
- * uint64_t cpuamu_cnt_read(int idx);
+ * uint64_t cpuamu_cnt_read(unsigned int idx);
  *
  * Given `idx`, read the corresponding AMU counter
  * and return it in `x0`.
@@ -41,7 +41,7 @@
 endfunc cpuamu_cnt_read
 
 /*
- * void cpuamu_cnt_write(int idx, uint64_t val);
+ * void cpuamu_cnt_write(unsigned int idx, uint64_t val);
  *
  * Given `idx`, write `val` to the corresponding AMU counter.
  */