| commit | 411f4959b45b7a072b567dadf33b110936f14f32 | [log] [tgz] |
|---|---|---|
| author | lauwal01 <lauren.wehrmeister@arm.com> | Mon Jun 24 11:44:58 2019 -0500 |
| committer | lauwal01 <lauren.wehrmeister@arm.com> | Tue Jul 02 09:16:54 2019 -0500 |
| tree | 1ed19f9f44816e4c7fdaafb00457b5d51361e0d3 | |
| parent | 335b3c79c79dcfc04e9776ce2e21c3b16aa6febf [diff] |
Workaround for Neoverse N1 erratum 1262606 Neoverse N1 erratum 1262606 is a Cat B erratum [1], present in older revisions of the Neoverse N1 processor core. The workaround is to set a bit in the implementation defined CPUACTLR_EL1 system register, which delays instruction fetch after branch misprediction. [1] http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.pjdoc-466751330-10325/index.html Change-Id: Idd980e9d5310232d38f0ce272862e1fb0f02ce9a Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>