Do not trap access to floating point registers
Traps when accessing architectural features are disabled by clearing bits
in CPTR_EL3 during early boot, including accesses to floating point
registers. The value of this register was previously undetermined, causing
unwanted traps to EL3. Future EL3 code (for example, context save/restore
code) may use floating point registers, although they are not used by current
code.
Also, the '-mgeneral-regs-only' flag is enabled in the GCC settings to
prevent generation of code that uses floating point registers.
Change-Id: I9a03675f6387bbbee81a6f2c9ccf81150db03747
diff --git a/include/aarch64/arch.h b/include/aarch64/arch.h
index 89b7a35..bcde243 100644
--- a/include/aarch64/arch.h
+++ b/include/aarch64/arch.h
@@ -167,7 +167,8 @@
#define EL0VCTEN_BIT (1 << 1)
/* CPTR_EL3 definitions */
-#define TCPAC_BIT (1ull << 31)
+#define TCPAC_BIT (1 << 31)
+#define TTA_BIT (1 << 20)
#define TFP_BIT (1 << 10)
/* CPSR/SPSR definitions */