Remove current CPU mpidr from PSCI common code
Many of the interfaces internal to PSCI pass the current CPU
MPIDR_EL1 value from function to function. This is not required,
and with inline access to the system registers is less efficient
than requiring the code to read that register whenever required.
This patch remove the mpidr parameter from the affected interfaces
and reduces code in FVP BL3-1 size by 160 bytes.
Change-Id: I16120a7c6944de37232016d7e109976540775602
diff --git a/services/std_svc/psci/psci_entry.S b/services/std_svc/psci/psci_entry.S
index 5628d79..1ffde06 100644
--- a/services/std_svc/psci/psci_entry.S
+++ b/services/std_svc/psci/psci_entry.S
@@ -58,8 +58,6 @@
adr x23, psci_afflvl_suspend_finishers
psci_aff_common_finish_entry:
- adr x22, psci_afflvl_power_on_finish
-
/* ---------------------------------------------
* Initialise the pcpu cache pointer for the CPU
* ---------------------------------------------
@@ -92,11 +90,10 @@
bl get_power_on_target_afflvl
cmp x0, xzr
b.lt _panic
- mov x3, x23
- mov x2, x0
- mov x1, #MPIDR_AFFLVL0
- mrs x0, mpidr_el1
- blr x22
+ mov x2, x23
+ mov x1, x0
+ mov x0, #MPIDR_AFFLVL0
+ bl psci_afflvl_power_on_finish
/* --------------------------------------------
* Give ourselves a stack allocated in Normal