)]}' { "commit": "63a7a34706eedba4d13ce6fc661a634801cf8909", "tree": "098f8edad273ff30e97af128928b1a05af5daf16", "parents": [ "a4d821a5a625d941f95ec39fb51ac4fc07c46c5c" ], "author": { "name": "Toshiyuki Ogasahara", "email": "toshiyuki.ogasahara.bo@hitachi.com", "time": "Mon Jul 12 19:13:17 2021 +0900" }, "committer": { "name": "Marek Vasut", "email": "marek.vasut+renesas@gmail.com", "time": "Sun Sep 12 01:13:48 2021 +0200" }, "message": "feat(plat/rcar3): add SYSCEXTMASK bit set/clear in scu_power_up\n\nAdded the process of SYSECEXTMASK bit set/clear for following\npower Resume/Shutoff flow.\n\nSigned-off-by: Hideyuki Nitta \u003chideyuki.nitta.jf@hitachi.com\u003e\nSigned-off-by: Toshiyuki Ogasahara \u003ctoshiyuki.ogasahara.bo@hitachi.com\u003e\nSigned-off-by: Yoshifumi Hosoya \u003cyoshifumi.hosoya.wj@renesas.com\u003e\nChange-Id: I71ed22840a42e7ab7d87bfd4241eec6f5ddb129b\n", "tree_diff": [ { "type": "modify", "old_id": "3f60fe63382cec524398ab4c92c2278c14285426", "old_mode": 33188, "old_path": "drivers/renesas/common/pwrc/pwrc.c", "new_id": "d29a0267c0506860a04d1efee939aa5898339e68", "new_mode": 33188, "new_path": "drivers/renesas/common/pwrc/pwrc.c" }, { "type": "modify", "old_id": "9201b6e21b2b47c1b3c413e7b32eebe394103b83", "old_mode": 33188, "old_path": "plat/renesas/common/include/rcar_def.h", "new_id": "2cd26edbfad8fa03e91724ef2ce2aba1967a5430", "new_mode": 33188, "new_path": "plat/renesas/common/include/rcar_def.h" } ] }