diff --git a/drivers/arm/smmu/smmu_v3.c b/drivers/arm/smmu/smmu_v3.c
index 7b017e3..ddb9963 100644
--- a/drivers/arm/smmu/smmu_v3.c
+++ b/drivers/arm/smmu/smmu_v3.c
@@ -1,15 +1,12 @@
 /*
- * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
  *
  * SPDX-License-Identifier: BSD-3-Clause
  */
 
 #include <mmio.h>
 #include <smmu_v3.h>
-
-/* Test for pending invalidate */
-#define INVAL_PENDING(_base)	\
-	smmuv3_read_s_init(_base) & SMMU_S_INIT_INV_ALL_MASK
+#include <stdbool.h>
 
 static inline uint32_t smmuv3_read_s_idr1(uintptr_t base)
 {
@@ -26,6 +23,12 @@
 	mmio_write_32(base + SMMU_S_INIT, value);
 }
 
+/* Test for pending invalidate */
+static inline bool smmuv3_inval_pending(uintptr_t base)
+{
+	return (smmuv3_read_s_init(base) & SMMU_S_INIT_INV_ALL_MASK) != 0U;
+}
+
 /*
  * Initialize the SMMU by invalidating all secure caches and TLBs.
  *
@@ -41,14 +44,14 @@
 	 * SMMU_S_INIT register is accessed.
 	 */
 	idr1_reg = smmuv3_read_s_idr1(smmu_base);
-	if (!((idr1_reg >> SMMU_S_IDR1_SECURE_IMPL_SHIFT) &
-			SMMU_S_IDR1_SECURE_IMPL_MASK)) {
+	if (((idr1_reg >> SMMU_S_IDR1_SECURE_IMPL_SHIFT) &
+			SMMU_S_IDR1_SECURE_IMPL_MASK) == 0U) {
 		return -1;
 	}
 
 	/* Initiate invalidation, and wait for it to finish */
 	smmuv3_write_s_init(smmu_base, SMMU_S_INIT_INV_ALL_MASK);
-	while (INVAL_PENDING(smmu_base))
+	while (smmuv3_inval_pending(smmu_base))
 		;
 
 	return 0;