| commit | 84e82085a1d59624ab7dc14256a152d6d7dd15f2 | [log] [tgz] |
|---|---|---|
| author | Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com> | Wed Jun 12 14:30:30 2024 +0300 |
| committer | Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com> | Fri Jul 19 08:40:14 2024 +0300 |
| tree | b9214611f43c709b2c3dd14cf8257d8c86163db7 | |
| parent | b5101c452e3fefdf4fe13d944372e5ad5d2ea5c4 [diff] |
feat(nxp-clk): add ARM PLL ODIV enablement Enable the PLL dividers using their memory-mapped interface. Otherwise, the clock will not be propagated to downstream clock modules. Change-Id: I39115cb2cb754cee87d7b6b4aa7502c3f1ef37ce Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>