fix(errata): workaround for Cortex-A710 erratum 2136059
Cortex-A710 erratum 2136059 is a Cat B erratum that applies to
revisions r0p0, r1p0 and r2p0 of the CPU. It is fixed in r2p1.
The workaround is to set CPUACTLR5_EL1[44] to 1 which will cause
the CPP instruction to invalidate the hardware prefetcher state
trained from any EL.
SDEN can be found here:
https://developer.arm.com/documentation/SDEN1775101/latest
Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
Change-Id: I43a86a365418fb663cc1b6ab1d365b4beddae0bc
diff --git a/docs/design/cpu-specific-build-macros.rst b/docs/design/cpu-specific-build-macros.rst
index 6f45f20..6029035 100644
--- a/docs/design/cpu-specific-build-macros.rst
+++ b/docs/design/cpu-specific-build-macros.rst
@@ -413,6 +413,10 @@
Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0 and r2p0
of the CPU and is fixed in r2p1.
+- ``ERRATA_A710_2136059``: This applies errata 2136059 workaround to
+ Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0 and r2p0
+ of the CPU and is fixed in r2p1.
+
For Neoverse N2, the following errata build flags are defined :
- ``ERRATA_N2_2002655``: This applies errata 2002655 workaround to Neoverse-N2