PSCI: Rework generic code to conform to coding guidelines
This patch reworks the PSCI generic implementation to conform to ARM
Trusted Firmware coding guidelines as described here:
https://github.com/ARM-software/arm-trusted-firmware/wiki
This patch also reviews the use of signed data types within PSCI
Generic code and replaces them with their unsigned counterparts wherever
they are not appropriate. The PSCI_INVALID_DATA macro which was defined
to -1 is now replaced with PSCI_INVALID_PWR_LVL macro which is defined
to PLAT_MAX_PWR_LVL + 1.
Change-Id: Iaea422d0e46fc314e0b173c2b4c16e0d56b2515a
diff --git a/services/std_svc/psci/psci_main.c b/services/std_svc/psci/psci_main.c
index 6d3af20..e6cd3a3 100644
--- a/services/std_svc/psci/psci_main.c
+++ b/services/std_svc/psci/psci_main.c
@@ -41,9 +41,9 @@
/*******************************************************************************
* PSCI frontend api for servicing SMCs. Described in the PSCI spec.
******************************************************************************/
-int psci_cpu_on(unsigned long target_cpu,
- unsigned long entrypoint,
- unsigned long context_id)
+int psci_cpu_on(u_register_t target_cpu,
+ uintptr_t entrypoint,
+ u_register_t context_id)
{
int rc;
@@ -77,8 +77,8 @@
}
int psci_cpu_suspend(unsigned int power_state,
- unsigned long entrypoint,
- unsigned long context_id)
+ uintptr_t entrypoint,
+ u_register_t context_id)
{
int rc;
unsigned int target_pwrlvl, is_power_down_state;
@@ -147,8 +147,8 @@
return PSCI_E_SUCCESS;
}
-int psci_system_suspend(unsigned long entrypoint,
- unsigned long context_id)
+
+int psci_system_suspend(uintptr_t entrypoint, u_register_t context_id)
{
int rc;
psci_power_state_t state_info;
@@ -188,7 +188,7 @@
int psci_cpu_off(void)
{
int rc;
- int target_pwrlvl = PLAT_MAX_PWR_LVL;
+ unsigned int target_pwrlvl = PLAT_MAX_PWR_LVL;
/*
* Do what is needed to power off this CPU and possible higher power
@@ -206,7 +206,7 @@
return rc;
}
-int psci_affinity_info(unsigned long target_affinity,
+int psci_affinity_info(u_register_t target_affinity,
unsigned int lowest_affinity_level)
{
unsigned int target_idx;
@@ -223,10 +223,10 @@
return psci_get_aff_info_state_by_idx(target_idx);
}
-int psci_migrate(unsigned long target_cpu)
+int psci_migrate(u_register_t target_cpu)
{
int rc;
- unsigned long resident_cpu_mpidr;
+ u_register_t resident_cpu_mpidr;
rc = psci_spd_migrate_info(&resident_cpu_mpidr);
if (rc != PSCI_TOS_UP_MIG_CAP)
@@ -255,14 +255,14 @@
int psci_migrate_info_type(void)
{
- unsigned long resident_cpu_mpidr;
+ u_register_t resident_cpu_mpidr;
return psci_spd_migrate_info(&resident_cpu_mpidr);
}
long psci_migrate_info_up_cpu(void)
{
- unsigned long resident_cpu_mpidr;
+ u_register_t resident_cpu_mpidr;
int rc;
/*
@@ -278,7 +278,7 @@
int psci_features(unsigned int psci_fid)
{
- uint32_t local_caps = psci_caps;
+ unsigned int local_caps = psci_caps;
/* Check if it is a 64 bit function */
if (((psci_fid >> FUNCID_CC_SHIFT) & FUNCID_CC_MASK) == SMC_64)