Rework BL3-1 unhandled exception handling and reporting
This patch implements the register reporting when unhandled exceptions are
taken in BL3-1. Unhandled exceptions will result in a dump of registers
to the console, before halting execution by that CPU. The Crash Stack,
previously called the Exception Stack, is used for this activity.
This stack is used to preserve the CPU context and runtime stack
contents for debugging and analysis.
This also introduces the per_cpu_ptr_cache, referenced by tpidr_el3,
to provide easy access to some of BL3-1 per-cpu data structures.
Initially, this is used to provide a pointer to the Crash stack.
panic() now prints the the error file and line number in Debug mode
and prints the PC value in release mode.
The Exception Stack is renamed to Crash Stack with this patch.
The original intention of exception stack is no longer valid
since we intend to support several valid exceptions like IRQ
and FIQ in the trusted firmware context. This stack is now
utilized for dumping and reporting the system state when a
crash happens and hence the rename.
Fixes ARM-software/tf-issues#79 Improve reporting of unhandled exception
Change-Id: I260791dc05536b78547412d147193cdccae7811a
diff --git a/bl31/context_mgmt.c b/bl31/context_mgmt.c
index 8d1396e..eae608c 100644
--- a/bl31/context_mgmt.c
+++ b/bl31/context_mgmt.c
@@ -31,6 +31,7 @@
#include <arch_helpers.h>
#include <assert.h>
#include <bl_common.h>
+#include <bl31.h>
#include <context.h>
#include <context_mgmt.h>
#include <platform.h>
@@ -47,6 +48,9 @@
static context_info_t cm_context_info[PLATFORM_CORE_COUNT];
+/* The per_cpu_ptr_cache_t space allocation */
+static per_cpu_ptr_cache_t per_cpu_ptr_cache_space[PLATFORM_CORE_COUNT];
+
/*******************************************************************************
* Context management library initialisation routine. This library is used by
* runtime services to share pointers to 'cpu_context' structures for the secure
@@ -211,21 +215,31 @@
: : "r" (ctx));
}
-/*******************************************************************************
- * This function is used to program exception stack in the 'cpu_context'
- * structure. This is the initial stack used for taking and handling exceptions
- * at EL3. This stack is expected to be initialized once by each security state
- ******************************************************************************/
-void cm_init_exception_stack(uint64_t mpidr, uint32_t security_state)
+/************************************************************************
+ * The following function is used to populate the per cpu pointer cache.
+ * The pointer will be stored in the tpidr_el3 register.
+ *************************************************************************/
+void cm_init_pcpu_ptr_cache()
{
- cpu_context_t *ctx;
- el3_state_t *state;
+ unsigned long mpidr = read_mpidr();
+ uint32_t linear_id = platform_get_core_pos(mpidr);
+ per_cpu_ptr_cache_t *pcpu_ptr_cache;
- ctx = cm_get_context(mpidr, security_state);
- assert(ctx);
+ pcpu_ptr_cache = &per_cpu_ptr_cache_space[linear_id];
+ assert(pcpu_ptr_cache);
+ pcpu_ptr_cache->crash_stack = get_crash_stack(mpidr);
- /* Set exception stack in the context */
- state = get_el3state_ctx(ctx);
-
- write_ctx_reg(state, CTX_EXCEPTION_SP, get_exception_stack(mpidr));
+ cm_set_pcpu_ptr_cache(pcpu_ptr_cache);
}
+
+
+void cm_set_pcpu_ptr_cache(const void *pcpu_ptr)
+{
+ write_tpidr_el3((unsigned long)pcpu_ptr);
+}
+
+void *cm_get_pcpu_ptr_cache(void)
+{
+ return (void *)read_tpidr_el3();
+}
+