Configure all secure interrupts on ARM platforms
ARM TF configures all interrupts as non-secure except those which
are present in irq_sec_array. This patch updates the irq_sec_array
with the missing secure interrupts for ARM platforms.
It also updates the documentation to be inline with the latest
implementation.
Fixes ARM-software/tf-issues#312
Change-Id: I39956c56a319086e3929d1fa89030b4ec4b01fcc
diff --git a/include/plat/arm/css/common/css_def.h b/include/plat/arm/css/common/css_def.h
index e3dd2b0..157a22f 100644
--- a/include/plat/arm/css/common/css_def.h
+++ b/include/plat/arm/css/common/css_def.h
@@ -58,10 +58,9 @@
/* Interrupt handling constants */
#define CSS_IRQ_MHU 69
#define CSS_IRQ_GPU_SMMU_0 71
-#define CSS_IRQ_GPU_SMMU_1 73
-#define CSS_IRQ_ETR_SMMU 75
#define CSS_IRQ_TZC 80
#define CSS_IRQ_TZ_WDOG 86
+#define CSS_IRQ_SEC_SYS_TIMER 91
/*
* SCP <=> AP boot configuration