| commit | a8d81d61e120f2e5958f996cd59ab5219a8a3cce | [log] [tgz] |
|---|---|---|
| author | Sieu Mun Tang <sieu.mun.tang@intel.com> | Fri Oct 04 16:13:11 2024 +0800 |
| committer | Tang Sieu Mun <sieu.mun.tang@intel.com> | Thu Oct 17 23:14:55 2024 +0200 |
| tree | feb836969b200061058ba5cd3baad7280ae28d52 | |
| parent | 3eab6c920cfd56faa3ae01f8c4c1162bc6df9fb2 [diff] |
fix(intel): implement soc and lwsoc bridge control for burst speed Implement burst speed read/write for SOC and LWSOC. Set bridge control register to enable the register bit Change-Id: I815b912cb90d79a548163d198eea177d70dfbc0d Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com> Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>