| commit | ac6c135c83fe4efa4d6e9b9c06e899b57ce5647a | [log] [tgz] |
|---|---|---|
| author | Tanmay Shah <tanmay.shah@amd.com> | Tue Sep 13 11:10:08 2022 -0700 |
| committer | Tanmay Shah <tanmay.shah@amd.com> | Tue Sep 13 11:19:01 2022 -0700 |
| tree | 9d27bc7c674ed4453541136c30168a6131f526f2 | |
| parent | 207bda950d9cc741a9fa3767219ccc83d8dd2736 [diff] |
fix(zynqmp): ensure memory write finish with dsb() GICD reg write must complete before core goes to idle mode. Achieve this with dsb() barrier instruction in IPI ISR Signed-off-by: Tanmay Shah <tanmay.shah@amd.com> Change-Id: I5af42ca901567ee5e54a5434ebe3e673a92cb9be