mediatek: mt8195: Add gpio driver
Add gpio driver.
Signed-off-by: mtk20895 <zhiqiang.ma@mediatek.com>
Change-Id: I6ff6875c35294f56f2d8298d75cd18c230aad211
diff --git a/plat/mediatek/mt8195/bl31_plat_setup.c b/plat/mediatek/mt8195/bl31_plat_setup.c
index 61846a3..eaff349 100644
--- a/plat/mediatek/mt8195/bl31_plat_setup.c
+++ b/plat/mediatek/mt8195/bl31_plat_setup.c
@@ -18,6 +18,7 @@
/* Platform Includes */
#include <mt_gic_v3.h>
#include <mt_timer.h>
+#include <mtgpio.h>
#include <plat_params.h>
#include <plat_private.h>
@@ -86,6 +87,7 @@
mt_gic_driver_init();
mt_gic_init();
+ mt_gpio_init();
mt_systimer_init();
generic_delay_timer_init();
}
diff --git a/plat/mediatek/mt8195/drivers/gpio/mtgpio.c b/plat/mediatek/mt8195/drivers/gpio/mtgpio.c
new file mode 100644
index 0000000..daab84c
--- /dev/null
+++ b/plat/mediatek/mt8195/drivers/gpio/mtgpio.c
@@ -0,0 +1,44 @@
+/*
+ * Copyright (c) 2020, MediaTek Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#include <assert.h>
+#include <mtgpio.h>
+#include <platform_def.h>
+
+uintptr_t mt_gpio_find_reg_addr(uint32_t pin)
+{
+ uintptr_t reg_addr = 0U;
+ struct mt_pin_info gpio_info;
+
+ assert(pin < MAX_GPIO_PIN);
+
+ gpio_info = mt_pin_infos[pin];
+
+ switch (gpio_info.base & 0x0f) {
+ case 0:
+ reg_addr = IOCFG_BM_BASE;
+ break;
+ case 1:
+ reg_addr = IOCFG_BL_BASE;
+ break;
+ case 2:
+ reg_addr = IOCFG_BR_BASE;
+ break;
+ case 3:
+ reg_addr = IOCFG_LM_BASE;
+ break;
+ case 4:
+ reg_addr = IOCFG_RB_BASE;
+ break;
+ case 5:
+ reg_addr = IOCFG_TL_BASE;
+ break;
+ default:
+ break;
+ }
+
+ return reg_addr;
+}
diff --git a/plat/mediatek/mt8195/drivers/gpio/mtgpio.h b/plat/mediatek/mt8195/drivers/gpio/mtgpio.h
new file mode 100644
index 0000000..88b4706
--- /dev/null
+++ b/plat/mediatek/mt8195/drivers/gpio/mtgpio.h
@@ -0,0 +1,183 @@
+/*
+ * Copyright (c) 2020, MediaTek Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef MT_GPIO_H
+#define MT_GPIO_H
+
+#include <mtgpio_common.h>
+
+/* Enumeration for GPIO pin */
+typedef enum GPIO_PIN {
+ GPIO_UNSUPPORTED = -1,
+
+ GPIO0, GPIO1, GPIO2, GPIO3, GPIO4, GPIO5, GPIO6, GPIO7,
+ GPIO8, GPIO9, GPIO10, GPIO11, GPIO12, GPIO13, GPIO14, GPIO15,
+ GPIO16, GPIO17, GPIO18, GPIO19, GPIO20, GPIO21, GPIO22, GPIO23,
+ GPIO24, GPIO25, GPIO26, GPIO27, GPIO28, GPIO29, GPIO30, GPIO31,
+ GPIO32, GPIO33, GPIO34, GPIO35, GPIO36, GPIO37, GPIO38, GPIO39,
+ GPIO40, GPIO41, GPIO42, GPIO43, GPIO44, GPIO45, GPIO46, GPIO47,
+ GPIO48, GPIO49, GPIO50, GPIO51, GPIO52, GPIO53, GPIO54, GPIO55,
+ GPIO56, GPIO57, GPIO58, GPIO59, GPIO60, GPIO61, GPIO62, GPIO63,
+ GPIO64, GPIO65, GPIO66, GPIO67, GPIO68, GPIO69, GPIO70, GPIO71,
+ GPIO72, GPIO73, GPIO74, GPIO75, GPIO76, GPIO77, GPIO78, GPIO79,
+ GPIO80, GPIO81, GPIO82, GPIO83, GPIO84, GPIO85, GPIO86, GPIO87,
+ GPIO88, GPIO89, GPIO90, GPIO91, GPIO92, GPIO93, GPIO94, GPIO95,
+ GPIO96, GPIO97, GPIO98, GPIO99, GPIO100, GPIO101, GPIO102, GPIO103,
+ GPIO104, GPIO105, GPIO106, GPIO107, GPIO108, GPIO109, GPIO110, GPIO111,
+ GPIO112, GPIO113, GPIO114, GPIO115, GPIO116, GPIO117, GPIO118, GPIO119,
+ GPIO120, GPIO121, GPIO122, GPIO123, GPIO124, GPIO125, GPIO126, GPIO127,
+ GPIO128, GPIO129, GPIO130, GPIO131, GPIO132, GPIO133, GPIO134, GPIO135,
+ GPIO136, GPIO137, GPIO138, GPIO139, GPIO140, GPIO141, GPIO142, GPIO143,
+ MT_GPIO_BASE_MAX
+} GPIO_PIN;
+
+static const struct mt_pin_info mt_pin_infos[] = {
+ PIN(0, 1, 0, 0x23, 0x60),
+ PIN(1, 1, 1, 0x23, 0x60),
+ PIN(2, 1, 2, 0x23, 0x60),
+ PIN(3, 1, 3, 0x23, 0x60),
+ PIN(4, 1, 4, 0x23, 0x60),
+ PIN(5, 1, 5, 0x23, 0x60),
+ PIN(6, 0, 6, 0x23, 0x70),
+ PIN(7, 0, 7, 0x23, 0x70),
+ PIN(8, 0, 13, 0x23, 0x70),
+ PIN(9, 0, 8, 0x23, 0x70),
+ PIN(10, 0, 14, 0x23, 0x70),
+ PIN(11, 0, 9, 0x23, 0x70),
+ PIN(12, 0, 15, 0x23, 0x70),
+ PIN(13, 0, 10, 0x23, 0x70),
+ PIN(14, 0, 16, 0x23, 0x70),
+ PIN(15, 0, 11, 0x23, 0x70),
+ PIN(16, 0, 17, 0x23, 0x70),
+ PIN(17, 0, 12, 0x23, 0x70),
+ PIN(18, 0, 5, 0x10, 0x60),
+ PIN(19, 0, 12, 0x10, 0x60),
+ PIN(20, 0, 11, 0x10, 0x60),
+ PIN(21, 0, 10, 0x10, 0x60),
+ PIN(22, 0, 0, 0x10, 0x60),
+ PIN(23, 0, 1, 0x10, 0x60),
+ PIN(24, 0, 2, 0x10, 0x60),
+ PIN(25, 0, 4, 0x10, 0x60),
+ PIN(26, 0, 3, 0x10, 0x60),
+ PIN(27, 0, 6, 0x10, 0x60),
+ PIN(28, 0, 7, 0x10, 0x60),
+ PIN(29, 0, 8, 0x10, 0x60),
+ PIN(30, 0, 9, 0x10, 0x60),
+ PIN(31, 0, 13, 0x21, 0xa0),
+ PIN(32, 0, 12, 0x21, 0xa0),
+ PIN(33, 0, 11, 0x21, 0xa0),
+ PIN(34, 0, 14, 0x21, 0xa0),
+ PIN(35, 0, 15, 0x21, 0xa0),
+ PIN(36, 0, 3, 0x21, 0xb0),
+ PIN(37, 0, 6, 0x21, 0xb0),
+ PIN(38, 0, 4, 0x21, 0xb0),
+ PIN(39, 0, 5, 0x21, 0xb0),
+ PIN(40, 0, 8, 0x21, 0xb0),
+ PIN(41, 0, 7, 0x21, 0xb0),
+ PIN(42, 0, 10, 0x21, 0xb0),
+ PIN(43, 0, 9, 0x21, 0xb0),
+ PIN(44, 0, 20, 0x21, 0xb0),
+ PIN(45, 0, 21, 0x21, 0xb0),
+ PIN(46, 0, 18, 0x21, 0xa0),
+ PIN(47, 0, 16, 0x21, 0xa0),
+ PIN(48, 0, 19, 0x21, 0xa0),
+ PIN(49, 0, 17, 0x21, 0xa0),
+ PIN(50, 0, 25, 0x21, 0xa0),
+ PIN(51, 0, 20, 0x21, 0xa0),
+ PIN(52, 0, 26, 0x21, 0xa0),
+ PIN(53, 0, 21, 0x21, 0xa0),
+ PIN(54, 0, 22, 0x21, 0xa0),
+ PIN(55, 0, 23, 0x21, 0xa0),
+ PIN(56, 0, 24, 0x21, 0xa0),
+ PIN(57, 0, 29, 0x21, 0xa0),
+ PIN(58, 0, 27, 0x21, 0xa0),
+ PIN(59, 0, 30, 0x21, 0xa0),
+ PIN(60, 0, 28, 0x21, 0xa0),
+ PIN(61, 0, 8, 0x21, 0xa0),
+ PIN(62, 0, 7, 0x21, 0xa0),
+ PIN(63, 0, 10, 0x21, 0xa0),
+ PIN(64, 0, 9, 0x21, 0xa0),
+ PIN(65, 0, 1, 0x21, 0xb0),
+ PIN(66, 0, 31, 0x21, 0xa0),
+ PIN(67, 0, 0, 0x21, 0xb0),
+ PIN(68, 0, 2, 0x21, 0xb0),
+ PIN(69, 0, 0, 0x21, 0xa0),
+ PIN(70, 0, 6, 0x21, 0xa0),
+ PIN(71, 0, 4, 0x21, 0xa0),
+ PIN(72, 0, 5, 0x21, 0xa0),
+ PIN(73, 0, 1, 0x21, 0xa0),
+ PIN(74, 0, 2, 0x21, 0xa0),
+ PIN(75, 0, 3, 0x21, 0xa0),
+ PIN(76, 0, 11, 0x21, 0xb0),
+ PIN(77, 1, 1, 0x22, 0x60),
+ PIN(78, 1, 2, 0x22, 0x60),
+ PIN(79, 1, 9, 0x22, 0x60),
+ PIN(80, 1, 10, 0x22, 0x60),
+ PIN(81, 1, 11, 0x22, 0x60),
+ PIN(82, 1, 12, 0x22, 0x60),
+ PIN(83, 1, 13, 0x22, 0x60),
+ PIN(84, 1, 14, 0x22, 0x60),
+ PIN(85, 1, 15, 0x22, 0x60),
+ PIN(86, 1, 16, 0x22, 0x60),
+ PIN(87, 1, 3, 0x22, 0x60),
+ PIN(88, 1, 4, 0x22, 0x60),
+ PIN(89, 1, 5, 0x22, 0x60),
+ PIN(90, 1, 6, 0x22, 0x60),
+ PIN(91, 1, 7, 0x22, 0x60),
+ PIN(92, 1, 8, 0x22, 0x60),
+ PIN(93, 1, 18, 0x22, 0x60),
+ PIN(94, 1, 19, 0x22, 0x60),
+ PIN(95, 1, 17, 0x22, 0x60),
+ PIN(96, 1, 0, 0x22, 0x60),
+ PIN(97, 0, 20, 0x22, 0x70),
+ PIN(98, 0, 28, 0x22, 0x70),
+ PIN(99, 0, 27, 0x22, 0x70),
+ PIN(100, 0, 30, 0x22, 0x70),
+ PIN(101, 0, 29, 0x22, 0x70),
+ PIN(102, 0, 0, 0x22, 0x70),
+ PIN(103, 0, 31, 0x22, 0x70),
+ PIN(104, 1, 25, 0x22, 0x60),
+ PIN(105, 1, 26, 0x22, 0x60),
+ PIN(106, 1, 23, 0x22, 0x60),
+ PIN(107, 1, 24, 0x22, 0x60),
+ PIN(108, 0, 22, 0x22, 0x70),
+ PIN(109, 0, 21, 0x22, 0x70),
+ PIN(110, 1, 1, 0x14, 0x20),
+ PIN(111, 1, 0, 0x14, 0x20),
+ PIN(112, 1, 2, 0x14, 0x20),
+ PIN(113, 1, 3, 0x14, 0x20),
+ PIN(114, 1, 4, 0x14, 0x20),
+ PIN(115, 1, 5, 0x14, 0x20),
+ PIN(116, 1, 9, 0x25, 0x50),
+ PIN(117, 1, 8, 0x25, 0x50),
+ PIN(118, 1, 7, 0x25, 0x50),
+ PIN(119, 1, 6, 0x25, 0x50),
+ PIN(120, 1, 11, 0x25, 0x50),
+ PIN(121, 1, 1, 0x25, 0x50),
+ PIN(122, 1, 0, 0x25, 0x50),
+ PIN(123, 1, 5, 0x25, 0x50),
+ PIN(124, 1, 4, 0x25, 0x50),
+ PIN(125, 1, 3, 0x25, 0x50),
+ PIN(126, 1, 2, 0x25, 0x50),
+ PIN(127, 1, 10, 0x25, 0x50),
+ PIN(128, 0, 3, 0x22, 0x70),
+ PIN(129, 0, 1, 0x22, 0x70),
+ PIN(130, 0, 4, 0x22, 0x70),
+ PIN(131, 0, 2, 0x22, 0x70),
+ PIN(132, 0, 13, 0x25, 0x60),
+ PIN(133, 0, 12, 0x25, 0x60),
+ PIN(134, 0, 15, 0x25, 0x60),
+ PIN(135, 0, 14, 0x25, 0x60),
+ PIN(136, 0, 13, 0x21, 0xb0),
+ PIN(137, 0, 12, 0x21, 0xb0),
+ PIN(138, 0, 15, 0x21, 0xb0),
+ PIN(139, 0, 14, 0x21, 0xb0),
+ PIN(140, 0, 17, 0x21, 0xb0),
+ PIN(141, 0, 16, 0x21, 0xb0),
+ PIN(142, 0, 19, 0x21, 0xb0),
+ PIN(143, 0, 18, 0x21, 0xb0),
+};
+#endif /* MT_GPIO_H */
diff --git a/plat/mediatek/mt8195/include/platform_def.h b/plat/mediatek/mt8195/include/platform_def.h
index 307187e..a97d222 100644
--- a/plat/mediatek/mt8195/include/platform_def.h
+++ b/plat/mediatek/mt8195/include/platform_def.h
@@ -26,6 +26,17 @@
#define SPM_BASE (IO_PHYS + 0x00006000)
/*******************************************************************************
+ * GPIO related constants
+ ******************************************************************************/
+#define GPIO_BASE (IO_PHYS + 0x00005000)
+#define IOCFG_BM_BASE (IO_PHYS + 0x01D10000)
+#define IOCFG_BL_BASE (IO_PHYS + 0x01D30000)
+#define IOCFG_BR_BASE (IO_PHYS + 0x01D40000)
+#define IOCFG_LM_BASE (IO_PHYS + 0x01E20000)
+#define IOCFG_RB_BASE (IO_PHYS + 0x01EB0000)
+#define IOCFG_TL_BASE (IO_PHYS + 0x01F40000)
+
+/*******************************************************************************
* UART related constants
******************************************************************************/
#define UART0_BASE (IO_PHYS + 0x01001100)
diff --git a/plat/mediatek/mt8195/platform.mk b/plat/mediatek/mt8195/platform.mk
index 0f8263a..1a49b67 100644
--- a/plat/mediatek/mt8195/platform.mk
+++ b/plat/mediatek/mt8195/platform.mk
@@ -9,7 +9,9 @@
PLAT_INCLUDES := -I${MTK_PLAT}/common/ \
-I${MTK_PLAT}/common/drivers/gic600/ \
+ -I${MTK_PLAT}/common/drivers/gpio/ \
-I${MTK_PLAT}/common/drivers/timer/ \
+ -I${MTK_PLAT_SOC}/drivers/gpio/ \
-I${MTK_PLAT_SOC}/drivers/mcdi/ \
-I${MTK_PLAT_SOC}/drivers/spmc/ \
-I${MTK_PLAT_SOC}/include/
@@ -26,6 +28,7 @@
BL31_SOURCES += common/desc_image_load.c \
drivers/delay_timer/delay_timer.c \
+ drivers/gpio/gpio.c \
drivers/delay_timer/generic_delay_timer.c \
drivers/ti/uart/aarch64/16550_console.S \
lib/bl_aux_params/bl_aux_params.c \
@@ -33,6 +36,7 @@
lib/cpus/aarch64/cortex_a78.S \
plat/common/plat_gicv3.c \
${MTK_PLAT}/common/drivers/gic600/mt_gic_v3.c \
+ ${MTK_PLAT}/common/drivers/gpio/mtgpio_common.c \
${MTK_PLAT}/common/drivers/timer/mt_timer.c \
${MTK_PLAT}/common/mtk_cirq.c \
${MTK_PLAT}/common/mtk_plat_common.c \
@@ -41,9 +45,11 @@
${MTK_PLAT_SOC}/aarch64/platform_common.c \
${MTK_PLAT_SOC}/aarch64/plat_helpers.S \
${MTK_PLAT_SOC}/bl31_plat_setup.c \
+ ${MTK_PLAT_SOC}/drivers/gpio/mtgpio.c \
${MTK_PLAT_SOC}/drivers/mcdi/mt_cpu_pm.c \
${MTK_PLAT_SOC}/drivers/mcdi/mt_cpu_pm_cpc.c \
${MTK_PLAT_SOC}/drivers/mcdi/mt_mcdi.c \
+ ${MTK_PLAT_SOC}/drivers/gpio/mtgpio.c \
${MTK_PLAT_SOC}/drivers/spmc/mtspmc.c \
${MTK_PLAT_SOC}/plat_pm.c \
${MTK_PLAT_SOC}/plat_sip_calls.c \