Setup VBAR_EL3 incrementally
This patch ensures that VBAR_EL3 points to the simple stack-less
'early_exceptions' when the C runtime stack is not correctly setup to
use the more complex 'runtime_exceptions'. It is initialised to
'runtime_exceptions' once this is done.
This patch also moves all exception vectors into a '.vectors' section
and modifies linker scripts to place all such sections together. This
will minimize space wastage from alignment restrictions.
Change-Id: I8c3e596ea3412c8bd582af9e8d622bb1cb2e049d
diff --git a/common/psci/psci_afflvl_on.c b/common/psci/psci_afflvl_on.c
index 83d47d5..14f524c 100644
--- a/common/psci/psci_afflvl_on.c
+++ b/common/psci/psci_afflvl_on.c
@@ -353,7 +353,6 @@
/*
* Arch. management: Turn on mmu & restore architectural state
*/
- write_vbar((unsigned long) runtime_exceptions);
enable_mmu();
/*
diff --git a/common/psci/psci_afflvl_suspend.c b/common/psci/psci_afflvl_suspend.c
index 2abcafb..f374840 100644
--- a/common/psci/psci_afflvl_suspend.c
+++ b/common/psci/psci_afflvl_suspend.c
@@ -115,7 +115,6 @@
psci_suspend_context[index].sec_sysregs.mair = read_mair();
psci_suspend_context[index].sec_sysregs.tcr = read_tcr();
psci_suspend_context[index].sec_sysregs.ttbr = read_ttbr0();
- psci_suspend_context[index].sec_sysregs.vbar = read_vbar();
psci_suspend_context[index].sec_sysregs.pstate =
read_daif() & (DAIF_ABT_BIT | DAIF_DBG_BIT);
@@ -424,7 +423,6 @@
* Arch. management: Restore the stashed secure architectural
* context in the right order.
*/
- write_vbar(psci_suspend_context[index].sec_sysregs.vbar);
write_daif(read_daif() | psci_suspend_context[index].sec_sysregs.pstate);
write_mair(psci_suspend_context[index].sec_sysregs.mair);
write_tcr(psci_suspend_context[index].sec_sysregs.tcr);
diff --git a/common/psci/psci_entry.S b/common/psci/psci_entry.S
index a6a1a6f..28a4143 100644
--- a/common/psci/psci_entry.S
+++ b/common/psci/psci_entry.S
@@ -63,6 +63,17 @@
psci_aff_common_finish_entry:
adr x22, psci_afflvl_power_on_finish
+
+ /* ---------------------------------------------
+ * Exceptions should not occur at this point.
+ * Set VBAR in order to handle and report any
+ * that do occur
+ * ---------------------------------------------
+ */
+ adr x0, early_exceptions
+ msr vbar_el3, x0
+ isb
+
bl read_mpidr
mov x19, x0
bl platform_set_coherent_stack
@@ -90,6 +101,16 @@
mov x0, x19
bl platform_set_stack
+ /* ---------------------------------------------
+ * Now that the execution stack has been set
+ * up, enable full runtime exception handling.
+ * Since we're just about to leave this EL with
+ * ERET, we don't need an ISB here
+ * ---------------------------------------------
+ */
+ adr x0, runtime_exceptions
+ msr vbar_el3, x0
+
/* --------------------------------------------
* Use the size of the general purpose register
* context to restore the register state