tree 28621ff2a84e4cfce00ad8787f4992eeef47d78c
parent 1777ac11a54096de03cff09d212126e8ce077858
author Patrick Delaunay <patrick.delaunay@st.com> 1599233952 +0200
committer Patrick Delaunay <patrick.delaunay@foss.st.com> 1638519593 +0100

feat(stm32mp1): preserve the PLL4 settings for USB boot

The PLL4 can be used by ROM code as the source clock of USB PHYC and,
in this case, the PLL4 configuration must be preserved
with pll4_preserve to avoid USB disturbance.

This patch also adds an error when the clock tree PLL4 configuration
is not the PLL4 configuration used by ROM code; this error allows to
detect a invalid clock tree.

This commit corrects the coverity issue 343023.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Change-Id: I4bae9312a2db8dd342a38e649513d689b13976bb