| commit | c23dde6c193d26fae9b2a8e18140b90faeba3661 | [log] [tgz] |
|---|---|---|
| author | Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com> | Wed Jan 15 14:59:22 2025 +0200 |
| committer | Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com> | Thu Jan 23 13:13:24 2025 +0200 |
| tree | 9a81efb89b677315225781713ce5b1bca24d5fc8 | |
| parent | 43b4b29fb996ee05d2ca98c7f824d6a003342215 [diff] |
feat(nxp-clk): restore pll output dividers rate Reconfiguration of the PLL may be requested while some output dividers are already enabled. To prevent setting a different frequency for these enabled dividers, the driver will attempt to adjust the division factor to achieve the initially requested rate. Change-Id: I7800c05b2f21bbdeda243db865942b647983687d Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>