Fix MISRA defects in BL31 common code
Change-Id: I5993b425445ee794e6d2a792c244c0af53640655
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
diff --git a/plat/arm/common/arm_bl31_setup.c b/plat/arm/common/arm_bl31_setup.c
index c7c45b0..4e16e3b 100644
--- a/plat/arm/common/arm_bl31_setup.c
+++ b/plat/arm/common/arm_bl31_setup.c
@@ -16,8 +16,6 @@
#include <platform.h>
#include <ras.h>
-#define BL31_END (uintptr_t)(&__BL31_END__)
-
/*
* Placeholder variables for copying the arguments that have been passed to
* BL31 from BL2.
@@ -152,7 +150,7 @@
* Copy BL33 and BL32 (if present), entry point information.
* They are stored in Secure RAM, in BL2's address space.
*/
- while (bl_params) {
+ while (bl_params != NULL) {
if (bl_params->image_id == BL32_IMAGE_ID)
bl32_image_ep_info = *bl_params->ep_info;
@@ -162,7 +160,7 @@
bl_params = bl_params->next_params_info;
}
- if (bl33_image_ep_info.pc == 0)
+ if (bl33_image_ep_info.pc == 0U)
panic();
# else /* LOAD_IMAGE_V2 */
@@ -175,8 +173,8 @@
assert(from_bl2->h.version >= VERSION_1);
/* Dynamic Config is not supported for LOAD_IMAGE_V1 */
- assert(soc_fw_config == 0);
- assert(hw_config == 0);
+ assert(soc_fw_config == 0U);
+ assert(hw_config == 0U);
/*
* Copy BL32 (if populated by BL2) and BL33 entry point information.
@@ -236,7 +234,7 @@
/* Enable and initialize the System level generic timer */
mmio_write_32(ARM_SYS_CNTCTL_BASE + CNTCR_OFF,
- CNTCR_FCREQ(0) | CNTCR_EN);
+ CNTCR_FCREQ(0U) | CNTCR_EN);
/* Allow access to the System counter timer module */
arm_configure_sys_timer();