fix(errata): workaround for Cortex-A510 erratum 2218950
Cortex-A510 erratum 2218950 is a Cat B erratum that applies to revisions
r0p0, r0p1, r0p2, r0p3 and r1p0, and is fixed in r1p1.
SDEN can be found here:
https://developer.arm.com/documentation/SDEN2397239
Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: Icb6e369946f8978a08cf8ed5e4452782efb0a77a
diff --git a/docs/design/cpu-specific-build-macros.rst b/docs/design/cpu-specific-build-macros.rst
index 7360a0f..ffb748f 100644
--- a/docs/design/cpu-specific-build-macros.rst
+++ b/docs/design/cpu-specific-build-macros.rst
@@ -498,6 +498,10 @@
r0p3 and r1p0, it is fixed in r1p1. This workaround disables MPMM even if
ENABLE_MPMM=1.
+- ``ERRATA_A510_2218950``: This applies errata 2218950 workaround to
+ Cortex-A510 CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2,
+ r0p3 and r1p0, it is fixed in r1p1.
+
DSU Errata Workarounds
----------------------