feat(nxp-clk): add get_rate for clock muxes
From the get rate callback perspective, all types of clock muxes should
return the frequency of the selected source, regardless of whether it is
an MC_CGM or PLL mux.
Change-Id: I24ae821013b0844e4d62793fde12b53b043a9776
Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>
diff --git a/drivers/nxp/clk/s32cc/s32cc_clk_drv.c b/drivers/nxp/clk/s32cc/s32cc_clk_drv.c
index 7a199bc..5d0a304 100644
--- a/drivers/nxp/clk/s32cc/s32cc_clk_drv.c
+++ b/drivers/nxp/clk/s32cc/s32cc_clk_drv.c
@@ -1454,6 +1454,29 @@
return set_module_rate(&clk->desc, rate, orate, depth);
}
+static int get_mux_freq(const struct s32cc_clk_obj *module,
+ const struct s32cc_clk_drv *drv,
+ unsigned long *rate, unsigned int depth)
+{
+ const struct s32cc_clkmux *mux = s32cc_obj2clkmux(module);
+ const struct s32cc_clk *clk = s32cc_get_arch_clk(mux->source_id);
+ unsigned int ldepth = depth;
+ int ret;
+
+ ret = update_stack_depth(&ldepth);
+ if (ret != 0) {
+ return ret;
+ }
+
+ if (clk == NULL) {
+ ERROR("Mux (id:%" PRIu8 ") without a valid source (%lu)\n",
+ mux->index, mux->source_id);
+ return -EINVAL;
+ }
+
+ return get_clk_freq(&clk->desc, drv, rate, ldepth);
+}
+
static int set_dfs_div_freq(const struct s32cc_clk_obj *module, unsigned long rate,
unsigned long *orate, unsigned int *depth)
{
@@ -1638,6 +1661,12 @@
case s32cc_pll_out_div_t:
ret = get_pll_div_freq(module, drv, rate, ldepth);
break;
+ case s32cc_clkmux_t:
+ ret = get_mux_freq(module, drv, rate, ldepth);
+ break;
+ case s32cc_shared_clkmux_t:
+ ret = get_mux_freq(module, drv, rate, ldepth);
+ break;
default:
ret = -EINVAL;
break;