Merge "FVP: Fix BL31 load address and image size for RESET_TO_BL31=1" into integration
diff --git a/Makefile b/Makefile
index 7e41678..547b584 100644
--- a/Makefile
+++ b/Makefile
@@ -207,9 +207,10 @@
CPP = $(CC) -E $(TF_CFLAGS_$(ARCH))
PP = $(CC) -E $(TF_CFLAGS_$(ARCH))
else ifneq ($(findstring clang,$(notdir $(CC))),)
+CLANG_CCDIR = $(if $(filter-out ./,$(dir $(CC))),$(dir $(CC)),)
TF_CFLAGS_aarch32 = $(target32-directive) $(march32-directive)
TF_CFLAGS_aarch64 = -target aarch64-elf $(march64-directive)
-LD = ld.lld
+LD = $(CLANG_CCDIR)ld.lld
ifeq (, $(shell which $(LD)))
$(error "No $(LD) in PATH, make sure it is installed or set LD to a different linker")
endif
diff --git a/bl1/bl1.ld.S b/bl1/bl1.ld.S
index 877af8e..b20859b 100644
--- a/bl1/bl1.ld.S
+++ b/bl1/bl1.ld.S
@@ -65,8 +65,13 @@
* No need to pad out the .rodata section to a page boundary. Next is
* the .data section, which can mapped in ROM with the same memory
* attributes as the .rodata section.
+ *
+ * Pad out to 16 bytes though as .data section needs to be 16 byte
+ * aligned and lld does not align the LMA to the aligment specified
+ * on the .data section.
*/
__RODATA_END__ = .;
+ . = ALIGN(16);
} >ROM
#else
ro . : {
@@ -92,6 +97,13 @@
*(.vectors)
__RO_END__ = .;
+
+ /*
+ * Pad out to 16 bytes as .data section needs to be 16 byte aligned and
+ * lld does not align the LMA to the aligment specified on the .data
+ * section.
+ */
+ . = ALIGN(16);
} >ROM
#endif
diff --git a/services/spd/trusty/generic-arm64-smcall.c b/services/spd/trusty/generic-arm64-smcall.c
index dfc3e71..5c3a628 100644
--- a/services/spd/trusty/generic-arm64-smcall.c
+++ b/services/spd/trusty/generic-arm64-smcall.c
@@ -12,6 +12,22 @@
#include "generic-arm64-smcall.h"
+#ifndef PLAT_ARM_GICD_BASE
+#ifdef GICD_BASE
+#define PLAT_ARM_GICD_BASE GICD_BASE
+#define PLAT_ARM_GICC_BASE GICC_BASE
+#ifdef GICR_BASE
+#define PLAT_ARM_GICR_BASE GICR_BASE
+#endif
+#else
+#error PLAT_ARM_GICD_BASE or GICD_BASE must be defined
+#endif
+#endif
+
+#ifndef PLAT_ARM_GICR_BASE
+#define PLAT_ARM_GICR_BASE SMC_UNK
+#endif
+
int trusty_disable_serial_debug;
struct dputc_state {
@@ -48,12 +64,15 @@
static uint64_t trusty_get_reg_base(uint32_t reg)
{
switch (reg) {
- case 0:
+ case SMC_GET_GIC_BASE_GICD:
return PLAT_ARM_GICD_BASE;
- case 1:
+ case SMC_GET_GIC_BASE_GICC:
return PLAT_ARM_GICC_BASE;
+ case SMC_GET_GIC_BASE_GICR:
+ return PLAT_ARM_GICR_BASE;
+
default:
NOTICE("%s(0x%x) unknown reg\n", __func__, reg);
return SMC_UNK;
diff --git a/services/spd/trusty/generic-arm64-smcall.h b/services/spd/trusty/generic-arm64-smcall.h
index 06efc72..ac03469 100644
--- a/services/spd/trusty/generic-arm64-smcall.h
+++ b/services/spd/trusty/generic-arm64-smcall.h
@@ -23,5 +23,6 @@
*/
#define SMC_GET_GIC_BASE_GICD 0
#define SMC_GET_GIC_BASE_GICC 1
+#define SMC_GET_GIC_BASE_GICR 2
#define SMC_FC_GET_REG_BASE SMC_FASTCALL_NR(SMC_ENTITY_PLATFORM_MONITOR, 0x1)
#define SMC_FC64_GET_REG_BASE SMC_FASTCALL64_NR(SMC_ENTITY_PLATFORM_MONITOR, 0x1)
diff --git a/services/spd/trusty/trusty.c b/services/spd/trusty/trusty.c
index d6c092c..092ffa8 100644
--- a/services/spd/trusty/trusty.c
+++ b/services/spd/trusty/trusty.c
@@ -390,6 +390,10 @@
void plat_trusty_set_boot_args(aapcs64_params_t *args);
+#if !defined(TSP_SEC_MEM_SIZE) && defined(BL32_MEM_SIZE)
+#define TSP_SEC_MEM_SIZE BL32_MEM_SIZE
+#endif
+
#ifdef TSP_SEC_MEM_SIZE
#pragma weak plat_trusty_set_boot_args
void plat_trusty_set_boot_args(aapcs64_params_t *args)