)]}' { "commit": "d48088acbe400133037ae74acf1b722b059119bb", "tree": "0a0f4da9116079a457079a361f9775e603ba1853", "parents": [ "d5e2512c6b86409686f5d1282922ebdf72459fc2" ], "author": { "name": "johpow01", "email": "john.powell@arm.com", "time": "Fri Jan 07 17:12:31 2022 -0600" }, "committer": { "name": "John Powell", "email": "john.powell@arm.com", "time": "Wed Feb 23 00:57:00 2022 +0100" }, "message": "fix(errata): workaround for Cortex-A510 erratum 2042739\n\nCortex-A510 erratum 2042739 is a Cat B erratum that applies to revisions\nr0p0, r0p1 and r0p2 and is fixed in r0p3.\n\nSDEN can be found here:\nhttps://developer.arm.com/documentation/SDEN2397239\n\nSigned-off-by: John Powell \u003cjohn.powell@arm.com\u003e\nChange-Id: I1d2ebee3914396e1e298eb45bdab35ce9e194ad9\n", "tree_diff": [ { "type": "modify", "old_id": "7ba50233d519de423e937881bb0a377abf7f7210", "old_mode": 33188, "old_path": "docs/design/cpu-specific-build-macros.rst", "new_id": "95d43c4eaf5b725efaa4a8e3d5b49c3740ee3e81", "new_mode": 33188, "new_path": "docs/design/cpu-specific-build-macros.rst" }, { "type": "modify", "old_id": "ddf2b801efc21fe268b24dc4a5fcb006ddf7fa90", "old_mode": 33188, "old_path": "include/lib/cpus/aarch64/cortex_a510.h", "new_id": "fcb821fb41112d5c612c92550577ff169d26a486", "new_mode": 33188, "new_path": "include/lib/cpus/aarch64/cortex_a510.h" }, { "type": "modify", "old_id": "9c49e48e6579947f58186ba04cefcbbbeece3755", "old_mode": 33188, "old_path": "lib/cpus/aarch64/cortex_a510.S", "new_id": "3bf080f633fe13fca21de534614ea4c634da79b8", "new_mode": 33188, "new_path": "lib/cpus/aarch64/cortex_a510.S" }, { "type": "modify", "old_id": "f58acbee6c52ad3c2009ce72c8f7cbe69b1276dd", "old_mode": 33188, "old_path": "lib/cpus/cpu-ops.mk", "new_id": "53f5e746325fbdee31aac37385d4805d60327978", "new_mode": 33188, "new_path": "lib/cpus/cpu-ops.mk" } ] }