fix(imx8m): add ddr4 dvfs sw workaround for ERR050712

APB Write data corruption following MRCTRL0.mr_wr=1 while
hardware-driven MR access is occurring

When performing a software driven MR access, the following
sequence must be done automatically before performing other
APB register accesses:

1. Set MRCTRL0.mr_wr=1
2. Check for MRSTAT.mr_wr_busy=0. If not, go to step (2)
3. Check for MRSTAT.mr_wr_busy=0 again (for the second time),
   if not, go to step (2).

Signed-off-by: Jacky Bai <>
Reviewed-by: Ye Li <>
Change-Id: Ie26e08bcc83d3ed4844ed04a853162308dcdccd0
1 file changed