commit e1e5b1339b9f73f7f1893d8a6d4dfe4b19ba0ad1
author Rajan Vaja <rajan.vaja@xilinx.com> Tue Apr 20 02:53:01 2021 -0700
committer Abhyuday Godhasara <abhyuday.godhasara@xilinx.com> Tue May 25 07:02:49 2021 -0700
tree 3537188d09e22045a6cb35408fac455c3698617a
parent 09e153a9a84bc05b41bc40116372b10ef21308c0

fix(plat/xilinx/versal/include): correct IPI buffer offset

Use proper offset for IPI data based on offset for IPI0
channel.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Abhyuday Godhasara <abhyuday.godhasara@xilinx.com>
Change-Id: I3070517944dd353c3733aa595df0da030127751a

plat/xilinx/versal/include/plat_ipi.h

diff --git a/plat/xilinx/versal/include/plat_ipi.h b/plat/xilinx/versal/include/plat_ipi.h
index 6b08f32..36a4380 100644
--- a/plat/xilinx/versal/include/plat_ipi.h
+++ b/plat/xilinx/versal/include/plat_ipi.h
@@ -31,7 +31,7 @@
 #define IPI_BUFFER_APU_BASE	(IPI_BUFFER_BASEADDR + 0x400U)
 #define IPI_BUFFER_PMC_BASE	(IPI_BUFFER_BASEADDR + 0x200U)
 
-#define IPI_BUFFER_TARGET_APU_OFFSET	0x0U
+#define IPI_BUFFER_TARGET_APU_OFFSET	0x80U
 #define IPI_BUFFER_TARGET_PMC_OFFSET	0x40U
 
 #define IPI_BUFFER_LOCAL_BASE	IPI_BUFFER_APU_BASE