commit e6602d4b153b81b49b39c22e70f052f9018687b7
author Akram Ahmad <Akram.Ahmad@arm.com> Mon Jul 18 12:27:29 2022 +0100
committer Akram Ahmad <Akram.Ahmad@arm.com> Wed Aug 17 11:11:26 2022 +0200
tree 3ffed783a5a4b5f7c62e05d0a7a17f477aa746b0
parent 958b83966413059e559713f51dba8eecdecaff99

fix(errata): workaround for Neoverse-N2 erratum 2376738

Neoverse-N2 erratum 2376738 is a Cat B erratum that applies
to revision r0p0 of the CPU. It is fixed in r0p1. The workaround
is to set CPUACTLR2_EL1[0] to 1 to force PLDW/PFRM ST to
behave like PLD/PRFM LD and not cause invalidations to other
PE caches.

SDEN can be found here:
https://developer.arm.com/documentation/SDEN1982442/latest

Signed-off-by: Akram Ahmad <Akram.Ahmad@arm.com>
Change-Id: I4ad4434f9b7210244e67046d9657d218857dced5

docs/design/cpu-specific-build-macros.rst

diff --git a/docs/design/cpu-specific-build-macros.rst b/docs/design/cpu-specific-build-macros.rst
index ef4c1a3..e15c82e 100644
--- a/docs/design/cpu-specific-build-macros.rst
+++ b/docs/design/cpu-specific-build-macros.rst
@@ -516,6 +516,10 @@
 -  ``ERRATA_N2_2280757``: This applies errata 2280757 workaround to Neoverse-N2
    CPU. This needs to be enabled for revision r0p0 of the CPU and is still open.
 
+-  ``ERRATA_N2_2376738``: This applies errata 2376738 workaround to Neoverse-N2
+   CPU. This needs to be enabled for revision r0p0 of the CPU, it is fixed in
+   r0p1.
+
 -  ``ERRATA_N2_2388450``: This applies errata 2388450 workaround to Neoverse-N2
    CPU. This needs to be enabled for revision r0p0 of the CPU, it is fixed in
    r0p1.