)]}' { "commit": "e74d658181e5e69b6b5e16b40adc1ffef4c1efb9", "tree": "9f5d648afe455669bf450f50ea337d8cb27cb272", "parents": [ "c45d2febb98058efa77d812b094bd1456a916c29" ], "author": { "name": "Bipin Ravi", "email": "bipin.ravi@arm.com", "time": "Thu Oct 13 17:25:51 2022 -0500" }, "committer": { "name": "Bipin Ravi", "email": "bipin.ravi@arm.com", "time": "Wed Oct 26 16:45:12 2022 -0500" }, "message": "fix(security): optimisations for CVE-2022-23960\n\nOptimised the loop workaround for Spectre_BHB mitigation:\n1. use of speculation barrier for cores implementing SB instruction.\n2. use str/ldr instead of stp/ldp as the loop uses only X2 register.\n\nSigned-off-by: Bipin Ravi \u003cbipin.ravi@arm.com\u003e\nChange-Id: I8ac53ea1e42407ad8004c1d59c05f791011f195d\n", "tree_diff": [ { "type": "modify", "old_id": "7706cd831b2ce0aff9fe137a2624da2e003a97bc", "old_mode": 33188, "old_path": "include/arch/aarch64/asm_macros.S", "new_id": "66c39e5f1e84bf2d3043994b492343f2c4a7977d", "new_mode": 33188, "new_path": "include/arch/aarch64/asm_macros.S" }, { "type": "modify", "old_id": "e0e41cc47ccf1aa4f32444a3642d3747c277a7ad", "old_mode": 33188, "old_path": "lib/cpus/aarch64/wa_cve_2022_23960_bhb.S", "new_id": "ceb93f1390807ecfe45ea5c53cf4097b18a9ff4c", "new_mode": 33188, "new_path": "lib/cpus/aarch64/wa_cve_2022_23960_bhb.S" } ] }