intel: Refactor common platform code [2/5]
Share socfpga private definitions and storage driver between Agilex and
Stratix 10 platform.
Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: I6da147f4d2df4a97c505d4bbcffadf63bc3bf4a5
diff --git a/plat/intel/soc/agilex/bl2_plat_setup.c b/plat/intel/soc/agilex/bl2_plat_setup.c
index fa9a6a5..d65049d 100644
--- a/plat/intel/soc/agilex/bl2_plat_setup.c
+++ b/plat/intel/soc/agilex/bl2_plat_setup.c
@@ -15,19 +15,18 @@
#include <drivers/ti/uart/uart_16550.h>
#include <lib/xlat_tables/xlat_tables.h>
#include <platform_def.h>
-#include <socfpga_private.h>
#include "agilex_clock_manager.h"
#include "agilex_mailbox.h"
#include "agilex_memory_controller.h"
#include "agilex_pinmux.h"
-#include "agilex_private.h"
#include "agilex_reset_manager.h"
#include "agilex_system_manager.h"
#include "ccu/ncore_ccu.h"
#include "qspi/cadence_qspi.h"
#include "socfpga_handoff.h"
+#include "socfpga_private.h"
#include "wdt/watchdog.h"