intel: Refactor common platform code [2/5]
Share socfpga private definitions and storage driver between Agilex and
Stratix 10 platform.
Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: I6da147f4d2df4a97c505d4bbcffadf63bc3bf4a5
diff --git a/plat/intel/soc/stratix10/bl2_plat_setup.c b/plat/intel/soc/stratix10/bl2_plat_setup.c
index cc6b4a7..1cb9c25 100644
--- a/plat/intel/soc/stratix10/bl2_plat_setup.c
+++ b/plat/intel/soc/stratix10/bl2_plat_setup.c
@@ -19,7 +19,6 @@
#include <common/image_decompress.h>
#include <plat/common/platform.h>
#include <platform_def.h>
-#include <socfpga_private.h>
#include <drivers/synopsys/dw_mmc.h>
#include <lib/mmio.h>
#include <lib/xlat_tables/xlat_tables.h>
@@ -28,10 +27,10 @@
#include "s10_reset_manager.h"
#include "s10_clock_manager.h"
#include "s10_pinmux.h"
-#include "stratix10_private.h"
#include "include/s10_mailbox.h"
#include "qspi/cadence_qspi.h"
#include "socfpga_handoff.h"
+#include "socfpga_private.h"
#include "wdt/watchdog.h"
@@ -115,7 +114,7 @@
switch (boot_source) {
case BOOT_SOURCE_SDMMC:
dw_mmc_init(¶ms, &info);
- stratix10_io_setup(boot_source);
+ socfpga_io_setup(boot_source);
break;
case BOOT_SOURCE_QSPI:
@@ -124,7 +123,7 @@
cad_qspi_init(0, QSPI_CONFIG_CPHA, QSPI_CONFIG_CPOL,
QSPI_CONFIG_CSDA, QSPI_CONFIG_CSDADS,
QSPI_CONFIG_CSEOT, QSPI_CONFIG_CSSOT, 0);
- stratix10_io_setup(boot_source);
+ socfpga_io_setup(boot_source);
break;
default: