)]}' { "commit": "f571183b066b1a91b7fb178c3aad9d6360d1918c", "tree": "c20cdecc4c74c9de486175d9c65ae60a6ab02a66", "parents": [ "c703d752cce4fd101599378e72db66ccf53644fa" ], "author": { "name": "Sieu Mun Tang", "email": "sieu.mun.tang@intel.com", "time": "Mon Feb 28 15:24:59 2022 +0800" }, "committer": { "name": "Sieu Mun Tang", "email": "sieu.mun.tang@intel.com", "time": "Wed Mar 09 09:14:21 2022 +0800" }, "message": "fix(intel): make FPGA memory configurations platform specific\n\nDefine FPGA_CONFIG_SIZE and FPGA_CONFIG_ADDR in\nplatform-specific header. This is due to different\nallocated sizes between platforms.\n\nSigned-off-by: Abdul Halim, Muhammad Hadi Asyrafi \u003cmuhammad.hadi.asyrafi.abdul.halim@intel.com\u003e\nSigned-off-by: Sieu Mun Tang \u003csieu.mun.tang@intel.com\u003e\nChange-Id: Iac4fbf4d4940cdf31834a9d4332f9292870dee76\n", "tree_diff": [ { "type": "modify", "old_id": "6c9d81ceb14f3b8ff92efd4e4118e27f35b6b55e", "old_mode": 33188, "old_path": "plat/intel/soc/agilex/include/socfpga_plat_def.h", "new_id": "9c87e450d29ab3553ef5a33e1cf30b8138b527ca", "new_mode": 33188, "new_path": "plat/intel/soc/agilex/include/socfpga_plat_def.h" }, { "type": "modify", "old_id": "5770f11c95a19d77a9e5f8f54cfba1d8390c5ae6", "old_mode": 33188, "old_path": "plat/intel/soc/common/include/socfpga_sip_svc.h", "new_id": "0db71e23b2fea5dab6995a38a00045a26560e5fc", "new_mode": 33188, "new_path": "plat/intel/soc/common/include/socfpga_sip_svc.h" }, { "type": "modify", "old_id": "3b87df8a3cdde08d9731556b7be217ba5241e0b2", "old_mode": 33188, "old_path": "plat/intel/soc/n5x/include/socfpga_plat_def.h", "new_id": "91868525c69a7f9ae1471cd19c0dc354db82e408", "new_mode": 33188, "new_path": "plat/intel/soc/n5x/include/socfpga_plat_def.h" }, { "type": "modify", "old_id": "a2bd57b08883c2cdea18636a653112a10d043c8f", "old_mode": 33188, "old_path": "plat/intel/soc/stratix10/include/socfpga_plat_def.h", "new_id": "b84a5674923969350062e410a758e31af7144880", "new_mode": 33188, "new_path": "plat/intel/soc/stratix10/include/socfpga_plat_def.h" } ] }