commit f9f84f44fba3155f6d0559a9d29fd9404f774398
author kenny liang <kenny.liang@mediatek.com> Tue Aug 20 22:27:44 2019 +0800
committer kenny liang <kenny.liang@mediatek.com> Mon Sep 16 10:29:20 2019 +0800
tree 813c0005b265fc3b4053349e8ac033c527c76c74
parent e419574e85290d121ca5c0d62e469c0457290690

mediatek: mt8183: add MTK uart driver for controlling clock gate

Add uart clock gate contol for suspend/resume scenario.

Signed-off-by: kenny liang <kenny.liang@mediatek.com>
Change-Id: Id4197b0720630ec6c74aec206a9b206511bf515a

plat/mediatek/mt8183/include/platform_def.h

diff --git a/plat/mediatek/mt8183/include/platform_def.h b/plat/mediatek/mt8183/include/platform_def.h
index f802ac2..dab265b 100644
--- a/plat/mediatek/mt8183/include/platform_def.h
+++ b/plat/mediatek/mt8183/include/platform_def.h
@@ -87,6 +87,7 @@
  * UART related constants
  ******************************************************************************/
 #define UART0_BASE    (IO_PHYS + 0x01002000)
+#define UART1_BASE    (IO_PHYS + 0x01003000)
 
 #define UART_BAUDRATE 115200
 #define UART_CLOCK    26000000