| Paul Beesley | 40d553c | 2019-02-11 17:54:45 +0000 | [diff] [blame] | 1 | Platform Ports |
| 2 | ============== |
| 3 | |
| 4 | .. toctree:: |
| 5 | :maxdepth: 1 |
| 6 | :caption: Contents |
| 7 | :numbered: |
| Paul Beesley | 5e6b416 | 2019-10-16 13:41:13 +0000 | [diff] [blame] | 8 | :hidden: |
| Paul Beesley | 40d553c | 2019-02-11 17:54:45 +0000 | [diff] [blame] | 9 | |
| 10 | allwinner |
| Paul Beesley | 43f35ef | 2019-05-29 13:59:40 +0100 | [diff] [blame^] | 11 | arm/index |
| Paul Beesley | 40d553c | 2019-02-11 17:54:45 +0000 | [diff] [blame] | 12 | meson-gxbb |
| 13 | meson-gxl |
| Paul Beesley | e43ed98 | 2019-10-04 10:37:48 +0000 | [diff] [blame] | 14 | meson-g12a |
| Paul Beesley | f1e0f15 | 2019-09-25 12:58:36 +0000 | [diff] [blame] | 15 | hikey |
| 16 | hikey960 |
| 17 | intel-agilex |
| 18 | intel-stratix10 |
| 19 | marvell/index |
| Paul Beesley | 40d553c | 2019-02-11 17:54:45 +0000 | [diff] [blame] | 20 | mt8183 |
| 21 | nvidia-tegra |
| Paul Beesley | f1e0f15 | 2019-09-25 12:58:36 +0000 | [diff] [blame] | 22 | warp7 |
| 23 | imx8 |
| 24 | imx8m |
| 25 | ls1043a |
| 26 | poplar |
| Paul Beesley | 40d553c | 2019-02-11 17:54:45 +0000 | [diff] [blame] | 27 | qemu |
| Paul Beesley | e43ed98 | 2019-10-04 10:37:48 +0000 | [diff] [blame] | 28 | qemu-sbsa |
| Paul Beesley | f1e0f15 | 2019-09-25 12:58:36 +0000 | [diff] [blame] | 29 | rpi3 |
| Paul Beesley | e43ed98 | 2019-10-04 10:37:48 +0000 | [diff] [blame] | 30 | rpi4 |
| Paul Beesley | 40d553c | 2019-02-11 17:54:45 +0000 | [diff] [blame] | 31 | rcar-gen3 |
| 32 | rockchip |
| Paul Beesley | 40d553c | 2019-02-11 17:54:45 +0000 | [diff] [blame] | 33 | socionext-uniphier |
| Paul Beesley | 40d553c | 2019-02-11 17:54:45 +0000 | [diff] [blame] | 34 | synquacer |
| Paul Beesley | f1e0f15 | 2019-09-25 12:58:36 +0000 | [diff] [blame] | 35 | stm32mp1 |
| Paul Beesley | 40d553c | 2019-02-11 17:54:45 +0000 | [diff] [blame] | 36 | ti-k3 |
| Paul Beesley | 24dba2b | 2019-05-22 11:22:44 +0100 | [diff] [blame] | 37 | xilinx-versal |
| Paul Beesley | 40d553c | 2019-02-11 17:54:45 +0000 | [diff] [blame] | 38 | xilinx-zynqmp |
| Paul Beesley | 5e6b416 | 2019-10-16 13:41:13 +0000 | [diff] [blame] | 39 | |
| 40 | This section provides a list of supported upstream *platform ports* and the |
| Paul Beesley | 43f35ef | 2019-05-29 13:59:40 +0100 | [diff] [blame^] | 41 | documentation associated with them. |
| Paul Beesley | 5e6b416 | 2019-10-16 13:41:13 +0000 | [diff] [blame] | 42 | |
| 43 | .. note:: |
| 44 | In addition to the platforms ports listed within the table of contents, there |
| 45 | are several additional platforms that are supported upstream but which do not |
| 46 | currently have associated documentation: |
| 47 | |
| Paul Beesley | 5e6b416 | 2019-10-16 13:41:13 +0000 | [diff] [blame] | 48 | - Arm Neoverse N1 System Development Platform (N1SDP) |
| 49 | - Arm Neoverse Reference Design N1 Edge (RD-N1-Edge) FVP |
| 50 | - Arm Neoverse Reference Design E1 Edge (RD-E1-Edge) FVP |
| 51 | - Arm SGI-575 and SGM-775 |
| 52 | - MediaTek MT6795 and MT8173 SoCs |
| 53 | |
| Paul Beesley | 5e6b416 | 2019-10-16 13:41:13 +0000 | [diff] [blame] | 54 | -------------- |
| 55 | |
| 56 | *Copyright (c) 2019, Arm Limited. All rights reserved.* |