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Soren Brinkmannc8284402016-03-06 20:16:27 -08001/*
2 * Copyright (c) 2013-2015, ARM Limited and Contributors. All rights reserved.
3 *
dp-arm82cb2c12017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
Soren Brinkmannc8284402016-03-06 20:16:27 -08005 */
6
7/* ZynqMP power management enums and defines */
8
9#ifndef _PM_DEFS_H_
10#define _PM_DEFS_H_
11
12/*********************************************************************
13 * Macro definitions
14 ********************************************************************/
15
16/*
17 * Version number is a 32bit value, like:
18 * (PM_VERSION_MAJOR << 16) | PM_VERSION_MINOR
19 */
20#define PM_VERSION_MAJOR 0
21#define PM_VERSION_MINOR 2
22
23#define PM_VERSION ((PM_VERSION_MAJOR << 16) | PM_VERSION_MINOR)
24
25/* Capabilities for RAM */
26#define PM_CAP_ACCESS 0x1U
27#define PM_CAP_CONTEXT 0x2U
28
29#define MAX_LATENCY (~0U)
30#define MAX_QOS 100U
31
Filip Drazic95fd9902016-07-20 17:17:39 +020032/* State arguments of the self suspend */
33#define PM_STATE_CPU_IDLE 0x0U
34#define PM_STATE_SUSPEND_TO_RAM 0xFU
35
Soren Brinkmannc8284402016-03-06 20:16:27 -080036/*********************************************************************
37 * Enum definitions
38 ********************************************************************/
39
40enum pm_api_id {
41 /* Miscellaneous API functions: */
42 PM_GET_API_VERSION = 1, /* Do not change or move */
43 PM_SET_CONFIGURATION,
44 PM_GET_NODE_STATUS,
45 PM_GET_OP_CHARACTERISTIC,
46 PM_REGISTER_NOTIFIER,
47 /* API for suspending of PUs: */
48 PM_REQ_SUSPEND,
49 PM_SELF_SUSPEND,
50 PM_FORCE_POWERDOWN,
51 PM_ABORT_SUSPEND,
52 PM_REQ_WAKEUP,
53 PM_SET_WAKEUP_SOURCE,
54 PM_SYSTEM_SHUTDOWN,
55 /* API for managing PM slaves: */
56 PM_REQ_NODE,
57 PM_RELEASE_NODE,
58 PM_SET_REQUIREMENT,
59 PM_SET_MAX_LATENCY,
60 /* Direct control API functions: */
61 PM_RESET_ASSERT,
62 PM_RESET_GET_STATUS,
63 PM_MMIO_WRITE,
64 PM_MMIO_READ,
Nava kishore Mannef7d4bfc2016-08-20 23:11:11 +053065 PM_INIT,
Nava kishore Manne2ddc31d2016-08-20 23:18:09 +053066 PM_FPGA_LOAD,
67 PM_FPGA_GET_STATUS,
Siva Durga Prasad Paladugu3104f2e2016-08-24 11:45:47 +053068 PM_GET_CHIPID,
Rajan Vajaf61262a2018-01-18 22:54:07 -080069 PM_SECURE_RSA_AES,
70 PM_SECURE_SHA,
71 PM_SECURE_RSA,
Soren Brinkmannc8284402016-03-06 20:16:27 -080072 PM_API_MAX
73};
74
75enum pm_node_id {
76 NODE_UNKNOWN = 0,
77 NODE_APU,
78 NODE_APU_0,
79 NODE_APU_1,
80 NODE_APU_2,
81 NODE_APU_3,
82 NODE_RPU,
83 NODE_RPU_0,
84 NODE_RPU_1,
Rajan Vajaf61262a2018-01-18 22:54:07 -080085 NODE_PLD,
Soren Brinkmannc8284402016-03-06 20:16:27 -080086 NODE_FPD,
87 NODE_OCM_BANK_0,
88 NODE_OCM_BANK_1,
89 NODE_OCM_BANK_2,
90 NODE_OCM_BANK_3,
91 NODE_TCM_0_A,
92 NODE_TCM_0_B,
93 NODE_TCM_1_A,
94 NODE_TCM_1_B,
95 NODE_L2,
96 NODE_GPU_PP_0,
97 NODE_GPU_PP_1,
98 NODE_USB_0,
99 NODE_USB_1,
100 NODE_TTC_0,
101 NODE_TTC_1,
102 NODE_TTC_2,
103 NODE_TTC_3,
104 NODE_SATA,
105 NODE_ETH_0,
106 NODE_ETH_1,
107 NODE_ETH_2,
108 NODE_ETH_3,
109 NODE_UART_0,
110 NODE_UART_1,
111 NODE_SPI_0,
112 NODE_SPI_1,
113 NODE_I2C_0,
114 NODE_I2C_1,
115 NODE_SD_0,
116 NODE_SD_1,
117 NODE_DP,
118 NODE_GDMA,
119 NODE_ADMA,
120 NODE_NAND,
121 NODE_QSPI,
122 NODE_GPIO,
123 NODE_CAN_0,
124 NODE_CAN_1,
125 NODE_AFI,
126 NODE_APLL,
127 NODE_VPLL,
128 NODE_DPLL,
129 NODE_RPLL,
130 NODE_IOPLL,
131 NODE_DDR,
Mirela Simonovic2ba68952016-06-07 18:15:40 +0200132 NODE_IPI_APU,
Mirela Simonovic2c239f72016-06-17 16:17:23 +0200133 NODE_IPI_RPU_0,
Filip Drazic6aa4c532016-07-26 12:07:05 +0200134 NODE_GPU,
135 NODE_PCIE,
136 NODE_PCAP,
137 NODE_RTC,
Rajan Vajaf61262a2018-01-18 22:54:07 -0800138 NODE_LPD,
139 NODE_VCU,
140 NODE_IPI_RPU_1,
141 NODE_IPI_PL_0,
142 NODE_IPI_PL_1,
143 NODE_IPI_PL_2,
144 NODE_IPI_PL_3,
145 NODE_PL,
Filip Drazicb516b7d2016-07-26 12:11:33 +0200146 NODE_MAX
Soren Brinkmannc8284402016-03-06 20:16:27 -0800147};
148
149enum pm_request_ack {
150 REQ_ACK_NO = 1,
151 REQ_ACK_BLOCKING,
152 REQ_ACK_NON_BLOCKING,
153};
154
155enum pm_abort_reason {
156 ABORT_REASON_WKUP_EVENT = 100,
157 ABORT_REASON_PU_BUSY,
158 ABORT_REASON_NO_PWRDN,
159 ABORT_REASON_UNKNOWN,
160};
161
162enum pm_suspend_reason {
163 SUSPEND_REASON_PU_REQ = 201,
164 SUSPEND_REASON_ALERT,
165 SUSPEND_REASON_SYS_SHUTDOWN,
166};
167
168enum pm_ram_state {
169 PM_RAM_STATE_OFF = 1,
170 PM_RAM_STATE_RETENTION,
171 PM_RAM_STATE_ON,
172};
173
174enum pm_opchar_type {
175 PM_OPCHAR_TYPE_POWER = 1,
Soren Brinkmannc8284402016-03-06 20:16:27 -0800176 PM_OPCHAR_TYPE_TEMP,
Anes Hadziahmetagic493541d2016-05-12 16:17:30 +0200177 PM_OPCHAR_TYPE_LATENCY,
Soren Brinkmannc8284402016-03-06 20:16:27 -0800178};
179
180/**
181 * @PM_RET_SUCCESS: success
182 * @PM_RET_ERROR_ARGS: illegal arguments provided
183 * @PM_RET_ERROR_ACCESS: access rights violation
184 * @PM_RET_ERROR_TIMEOUT: timeout in communication with PMU
185 * @PM_RET_ERROR_NOTSUPPORTED: feature not supported
186 * @PM_RET_ERROR_PROC: node is not a processor node
187 * @PM_RET_ERROR_API_ID: illegal API ID
188 * @PM_RET_ERROR_OTHER: other error
189 */
190enum pm_ret_status {
191 PM_RET_SUCCESS,
192 PM_RET_ERROR_ARGS,
193 PM_RET_ERROR_ACCESS,
194 PM_RET_ERROR_TIMEOUT,
195 PM_RET_ERROR_NOTSUPPORTED,
196 PM_RET_ERROR_PROC,
197 PM_RET_ERROR_API_ID,
198 PM_RET_ERROR_FAILURE,
199 PM_RET_ERROR_COMMUNIC,
200 PM_RET_ERROR_DOUBLEREQ,
201 PM_RET_ERROR_OTHER,
202};
203
204/**
205 * @PM_INITIAL_BOOT: boot is a fresh system startup
206 * @PM_RESUME: boot is a resume
207 * @PM_BOOT_ERROR: error, boot cause cannot be identified
208 */
209enum pm_boot_status {
210 PM_INITIAL_BOOT,
211 PM_RESUME,
212 PM_BOOT_ERROR,
213};
214
Soren Brinkmann83531702016-09-02 09:50:54 -0700215enum pm_shutdown_type {
216 PMF_SHUTDOWN_TYPE_SHUTDOWN,
217 PMF_SHUTDOWN_TYPE_RESET,
218};
219
220enum pm_shutdown_subtype {
221 PMF_SHUTDOWN_SUBTYPE_SUBSYSTEM,
222 PMF_SHUTDOWN_SUBTYPE_PS_ONLY,
223 PMF_SHUTDOWN_SUBTYPE_SYSTEM,
224};
225
Soren Brinkmannc8284402016-03-06 20:16:27 -0800226#endif /* _PM_DEFS_H_ */