blob: 78410f1d9d21d2d1d0081420130f63f7181916a9 [file] [log] [blame]
Soby Mathewb48349e2015-06-29 16:30:12 +01001/*
Soby Mathew4067dc32015-05-05 16:33:16 +01002 * Copyright (c) 2013-2015, ARM Limited and Contributors. All rights reserved.
Soby Mathewb48349e2015-06-29 16:30:12 +01003 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
31#include <arch.h>
32#include <arch_helpers.h>
33#include <assert.h>
34#include <debug.h>
Soby Mathew82dcc032015-04-08 17:42:06 +010035#include <platform.h>
Soby Mathewb48349e2015-06-29 16:30:12 +010036#include <string.h>
37#include "psci_private.h"
38
Soby Mathew6590ce22015-06-30 11:00:24 +010039/******************************************************************************
Soby Mathewb48349e2015-06-29 16:30:12 +010040 * Top level handler which is called when a cpu wants to power itself down.
Soby Mathew4067dc32015-05-05 16:33:16 +010041 * It's assumed that along with turning the cpu power domain off, power
42 * domains at higher levels will be turned off as far as possible. It finds
43 * the highest level where a domain has to be powered off by traversing the
44 * node information and then performs generic, architectural, platform setup
45 * and state management required to turn OFF that power domain and domains
46 * below it. e.g. For a cpu that's to be powered OFF, it could mean programming
47 * the power controller whereas for a cluster that's to be powered off, it will
48 * call the platform specific code which will disable coherency at the
49 * interconnect level if the cpu is the last in the cluster and also the
50 * program the power controller.
Soby Mathewb48349e2015-06-29 16:30:12 +010051 ******************************************************************************/
Soby Mathew4067dc32015-05-05 16:33:16 +010052int psci_do_cpu_off(int end_pwrlvl)
Soby Mathewb48349e2015-06-29 16:30:12 +010053{
Soby Mathew82dcc032015-04-08 17:42:06 +010054 int rc, idx = plat_my_core_pos();
Soby Mathew4067dc32015-05-05 16:33:16 +010055 unsigned int max_phys_off_pwrlvl;
Soby Mathewb48349e2015-06-29 16:30:12 +010056
57 /*
58 * This function must only be called on platforms where the
59 * CPU_OFF platform hooks have been implemented.
60 */
Soby Mathew4067dc32015-05-05 16:33:16 +010061 assert(psci_plat_pm_ops->pwr_domain_off);
Soby Mathewb48349e2015-06-29 16:30:12 +010062
63 /*
Soby Mathew4067dc32015-05-05 16:33:16 +010064 * This function acquires the lock corresponding to each power
Soby Mathewb48349e2015-06-29 16:30:12 +010065 * level so that by the time all locks are taken, the system topology
66 * is snapshot and state management can be done safely.
67 */
Soby Mathew82dcc032015-04-08 17:42:06 +010068 psci_acquire_pwr_domain_locks(end_pwrlvl,
69 idx);
Soby Mathewb48349e2015-06-29 16:30:12 +010070
71 /*
72 * Call the cpu off handler registered by the Secure Payload Dispatcher
73 * to let it do any bookkeeping. Assume that the SPD always reports an
74 * E_DENIED error if SP refuse to power down
75 */
76 if (psci_spd_pm && psci_spd_pm->svc_off) {
77 rc = psci_spd_pm->svc_off(0);
78 if (rc)
79 goto exit;
80 }
81
82 /*
Soby Mathew4067dc32015-05-05 16:33:16 +010083 * This function updates the state of each power domain instance
Soby Mathew82dcc032015-04-08 17:42:06 +010084 * corresponding to the cpu index in the range of power levels
Soby Mathewb48349e2015-06-29 16:30:12 +010085 * specified.
86 */
Soby Mathew82dcc032015-04-08 17:42:06 +010087 psci_do_state_coordination(end_pwrlvl,
88 idx,
89 PSCI_STATE_OFF);
Soby Mathewb48349e2015-06-29 16:30:12 +010090
Soby Mathew82dcc032015-04-08 17:42:06 +010091 max_phys_off_pwrlvl = psci_find_max_phys_off_pwrlvl(end_pwrlvl, idx);
Soby Mathew4067dc32015-05-05 16:33:16 +010092 assert(max_phys_off_pwrlvl != PSCI_INVALID_DATA);
Soby Mathewb48349e2015-06-29 16:30:12 +010093
Soby Mathew6590ce22015-06-30 11:00:24 +010094 /*
95 * Arch. management. Perform the necessary steps to flush all
96 * cpu caches.
97 */
Soby Mathew4067dc32015-05-05 16:33:16 +010098 psci_do_pwrdown_cache_maintenance(max_phys_off_pwrlvl);
Soby Mathewb48349e2015-06-29 16:30:12 +010099
100 /*
Soby Mathew6590ce22015-06-30 11:00:24 +0100101 * Plat. management: Perform platform specific actions to turn this
102 * cpu off e.g. exit cpu coherency, program the power controller etc.
Soby Mathewb48349e2015-06-29 16:30:12 +0100103 */
Soby Mathew4067dc32015-05-05 16:33:16 +0100104 psci_plat_pm_ops->pwr_domain_off(max_phys_off_pwrlvl);
Soby Mathewb48349e2015-06-29 16:30:12 +0100105
106exit:
107 /*
Soby Mathew4067dc32015-05-05 16:33:16 +0100108 * Release the locks corresponding to each power level in the
Soby Mathewb48349e2015-06-29 16:30:12 +0100109 * reverse order to which they were acquired.
110 */
Soby Mathew82dcc032015-04-08 17:42:06 +0100111 psci_release_pwr_domain_locks(end_pwrlvl,
112 idx);
Soby Mathewb48349e2015-06-29 16:30:12 +0100113
114 /*
115 * Check if all actions needed to safely power down this cpu have
116 * successfully completed. Enter a wfi loop which will allow the
117 * power controller to physically power down this cpu.
118 */
119 if (rc == PSCI_E_SUCCESS)
120 psci_power_down_wfi();
121
122 return rc;
123}