| Oliver Swede | 536d906 | 2019-11-11 11:11:06 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2020, ARM Limited and Contributors. All rights reserved. |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #ifndef FPGA_PRIVATE_H |
| 8 | #define FPGA_PRIVATE_H |
| 9 | |
| Javier Almansa Sobrino | 727bbf6 | 2020-05-13 14:09:58 +0100 | [diff] [blame] | 10 | #include "../fpga_def.h" |
| 11 | #include <platform_def.h> |
| 12 | |
| 13 | #define C_RUNTIME_READY_KEY (0xaa55aa55) |
| 14 | #define VALID_MPID (1U) |
| Andre Przywara | fa30f73 | 2020-07-07 10:40:46 +0100 | [diff] [blame] | 15 | #define FPGA_MAX_DTB_SIZE 0x10000 |
| Javier Almansa Sobrino | 727bbf6 | 2020-05-13 14:09:58 +0100 | [diff] [blame] | 16 | |
| 17 | #ifndef __ASSEMBLER__ |
| 18 | |
| 19 | extern unsigned char fpga_valid_mpids[PLATFORM_CORE_COUNT]; |
| Oliver Swede | 536d906 | 2019-11-11 11:11:06 +0000 | [diff] [blame] | 20 | |
| 21 | void fpga_console_init(void); |
| 22 | |
| Oliver Swede | 87762bc | 2019-12-03 14:08:21 +0000 | [diff] [blame] | 23 | void plat_fpga_gic_init(void); |
| 24 | void fpga_pwr_gic_on_finish(void); |
| 25 | void fpga_pwr_gic_off(void); |
| Javier Almansa Sobrino | 727bbf6 | 2020-05-13 14:09:58 +0100 | [diff] [blame] | 26 | unsigned int plat_fpga_calc_core_pos(uint32_t mpid); |
| Andre Przywara | 283e559 | 2020-08-24 18:34:50 +0100 | [diff] [blame] | 27 | unsigned int fpga_get_nr_gic_cores(void); |
| Andre Przywara | c69f815 | 2021-05-18 15:53:05 +0100 | [diff] [blame] | 28 | uintptr_t fpga_get_redist_size(void); |
| Andre Przywara | 93b785f | 2021-05-19 09:40:01 +0100 | [diff] [blame] | 29 | uintptr_t fpga_get_redist_base(void); |
| Andre Przywara | d7e39c4 | 2021-07-20 20:05:38 +0100 | [diff] [blame] | 30 | bool fpga_has_its(void); |
| Oliver Swede | 87762bc | 2019-12-03 14:08:21 +0000 | [diff] [blame] | 31 | |
| Javier Almansa Sobrino | 727bbf6 | 2020-05-13 14:09:58 +0100 | [diff] [blame] | 32 | #endif /* __ASSEMBLER__ */ |
| 33 | |
| 34 | #endif /* FPGA_PRIVATE_H */ |