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review.trustedfirmware.org / TF-A / trusted-firmware-a / ca93b018dc7aeebb84641b73edab6ca85b7a5908 / . / plat / mediatek / mt8192 / platform.mk
blob: ccc9a718e254d8fc0e4be32936d70ae528b47077 [file] [log] [blame]
Nina Wuf85f37d2020-04-17 17:14:23 +0800[diff] [blame]1#
Leon Chen2f3f5932022-05-29 22:25:44 +0800[diff] [blame]2# Copyright (c) 2020-2022, MediaTek Inc. All rights reserved.
Nina Wuf85f37d2020-04-17 17:14:23 +0800[diff] [blame]3#
4# SPDX-License-Identifier: BSD-3-Clause
5#
6
7MTK_PLAT := plat/mediatek
8MTK_PLAT_SOC := ${MTK_PLAT}/${PLAT}
9
10PLAT_INCLUDES := -I${MTK_PLAT}/common/ \
Rex-BC Chencc768962022-07-08 14:48:56 +0800[diff] [blame]11 -I${MTK_PLAT}/drivers/cirq/ \
Bo-Chen Chen33747522022-09-05 11:18:04 +0800[diff] [blame]12 -I${MTK_PLAT}/drivers/gic600/ \
13 -I${MTK_PLAT}/drivers/gpio/ \
14 -I${MTK_PLAT}/drivers/lpm/ \
Bo-Chen Chenca93b012022-09-01 15:16:23 +0800[diff] [blame^]15 -I${MTK_PLAT}/drivers/pmic_wrap/ \
Bo-Chen Chen33747522022-09-05 11:18:04 +0800[diff] [blame]16 -I${MTK_PLAT}/drivers/rtc/ \
17 -I${MTK_PLAT}/drivers/timer/ \
18 -I${MTK_PLAT}/drivers/uart/ \
Leon Chen2f3f5932022-05-29 22:25:44 +0800[diff] [blame]19 -I${MTK_PLAT}/include/ \
Po Xu054af8f2020-09-18 09:32:31 +0800[diff] [blame]20 -I${MTK_PLAT_SOC}/include/ \
21 -I${MTK_PLAT_SOC}/drivers/ \
Flora Fuca4c0c22021-04-20 12:53:15 +0800[diff] [blame]22 -I${MTK_PLAT_SOC}/drivers/apusys/ \
Nina Wu43d7bbc2020-09-08 14:36:07 +0800[diff] [blame]23 -I${MTK_PLAT_SOC}/drivers/dcm \
Nina Wu6b822d42021-02-09 11:28:00 +0800[diff] [blame]24 -I${MTK_PLAT_SOC}/drivers/devapc \
Rex-BC Chen5183e632021-07-05 20:42:09 +0800[diff] [blame]25 -I${MTK_PLAT_SOC}/drivers/dfd \
Xi Chen42f2fa82020-11-02 10:45:34 +0800[diff] [blame]26 -I${MTK_PLAT_SOC}/drivers/emi_mpu/ \
Dehui Sun4a128012020-07-03 09:19:06 +0800[diff] [blame]27 -I${MTK_PLAT_SOC}/drivers/gpio/ \
James Liao271d9492020-06-15 16:41:03 +0800[diff] [blame]28 -I${MTK_PLAT_SOC}/drivers/mcdi/ \
Hsin-Hsiung Wangcbd63312020-08-12 16:31:06 +0800[diff] [blame]29 -I${MTK_PLAT_SOC}/drivers/pmic/ \
elly.chiang8709c932020-08-25 22:31:14 +0800[diff] [blame]30 -I${MTK_PLAT_SOC}/drivers/ptp3/ \
Yidi Lin46946032021-03-26 15:53:20 +0800[diff] [blame]31 -I${MTK_PLAT_SOC}/drivers/spmc/
Nina Wuf85f37d2020-04-17 17:14:23 +0800[diff] [blame]32
Greta Zhang74f72b12020-06-09 13:38:35 +0800[diff] [blame]33GICV3_SUPPORT_GIC600 := 1
Nina Wuf85f37d2020-04-17 17:14:23 +0800[diff] [blame]34include drivers/arm/gic/v3/gicv3.mk
35include lib/xlat_tables_v2/xlat_tables.mk
36
37PLAT_BL_COMMON_SOURCES := ${GICV3_SOURCES} \
38 ${XLAT_TABLES_LIB_SRCS} \
39 plat/common/aarch64/crash_console_helpers.S \
40 plat/common/plat_psci_common.c
41
42BL31_SOURCES += common/desc_image_load.c \
Nina Wu95cc8892020-08-05 13:53:59 +0800[diff] [blame]43 drivers/delay_timer/delay_timer.c \
44 drivers/delay_timer/generic_delay_timer.c \
Nina Wuf85f37d2020-04-17 17:14:23 +0800[diff] [blame]45 drivers/ti/uart/aarch64/16550_console.S \
Po Xu054af8f2020-09-18 09:32:31 +0800[diff] [blame]46 drivers/gpio/gpio.c \
Nina Wuf85f37d2020-04-17 17:14:23 +0800[diff] [blame]47 lib/bl_aux_params/bl_aux_params.c \
48 lib/cpus/aarch64/cortex_a55.S \
49 lib/cpus/aarch64/cortex_a76.S \
50 plat/common/plat_gicv3.c \
51 ${MTK_PLAT}/common/mtk_plat_common.c \
Nina Wu189f0382020-08-19 17:20:15 +0800[diff] [blame]52 ${MTK_PLAT}/common/mtk_sip_svc.c \
Nina Wuf85f37d2020-04-17 17:14:23 +0800[diff] [blame]53 ${MTK_PLAT}/common/params_setup.c \
Rex-BC Chencc768962022-07-08 14:48:56 +0800[diff] [blame]54 ${MTK_PLAT}/drivers/cirq/mt_cirq.c \
Bo-Chen Chen33747522022-09-05 11:18:04 +0800[diff] [blame]55 ${MTK_PLAT}/drivers/gic600/mt_gic_v3.c \
56 ${MTK_PLAT}/drivers/gpio/mtgpio_common.c \
57 ${MTK_PLAT}/drivers/lpm/mt_lp_rm.c \
58 ${MTK_PLAT}/drivers/pmic_wrap/pmic_wrap_init_v2.c \
59 ${MTK_PLAT}/drivers/rtc/rtc_common.c \
60 ${MTK_PLAT}/drivers/rtc/rtc_mt6359p.c \
61 ${MTK_PLAT}/drivers/timer/mt_timer.c \
62 ${MTK_PLAT}/drivers/uart/uart.c \
Nina Wuf85f37d2020-04-17 17:14:23 +0800[diff] [blame]63 ${MTK_PLAT_SOC}/aarch64/platform_common.c \
64 ${MTK_PLAT_SOC}/aarch64/plat_helpers.S \
65 ${MTK_PLAT_SOC}/bl31_plat_setup.c \
Hsin-Hsiung Wangcbd63312020-08-12 16:31:06 +0800[diff] [blame]66 ${MTK_PLAT_SOC}/drivers/pmic/pmic.c \
Nina Wuf85f37d2020-04-17 17:14:23 +0800[diff] [blame]67 ${MTK_PLAT_SOC}/plat_pm.c \
Greta Zhang74f72b12020-06-09 13:38:35 +0800[diff] [blame]68 ${MTK_PLAT_SOC}/plat_topology.c \
Nina Wu189f0382020-08-19 17:20:15 +0800[diff] [blame]69 ${MTK_PLAT_SOC}/plat_sip_calls.c \
Flora Fuca4c0c22021-04-20 12:53:15 +0800[diff] [blame]70 ${MTK_PLAT_SOC}/drivers/apusys/mtk_apusys.c \
Flora Fuf46e1f12021-04-20 18:08:35 +0800[diff] [blame]71 ${MTK_PLAT_SOC}/drivers/apusys/mtk_apusys_apc.c \
Nina Wu43d7bbc2020-09-08 14:36:07 +0800[diff] [blame]72 ${MTK_PLAT_SOC}/drivers/dcm/mtk_dcm.c \
73 ${MTK_PLAT_SOC}/drivers/dcm/mtk_dcm_utils.c \
Nina Wu6b822d42021-02-09 11:28:00 +0800[diff] [blame]74 ${MTK_PLAT_SOC}/drivers/devapc/devapc.c \
Rex-BC Chen5183e632021-07-05 20:42:09 +0800[diff] [blame]75 ${MTK_PLAT_SOC}/drivers/dfd/plat_dfd.c \
Xi Chen42f2fa82020-11-02 10:45:34 +0800[diff] [blame]76 ${MTK_PLAT_SOC}/drivers/emi_mpu/emi_mpu.c \
Dehui Sun4a128012020-07-03 09:19:06 +0800[diff] [blame]77 ${MTK_PLAT_SOC}/drivers/gpio/mtgpio.c \
James Liao271d9492020-06-15 16:41:03 +0800[diff] [blame]78 ${MTK_PLAT_SOC}/drivers/mcdi/mt_cpu_pm.c \
79 ${MTK_PLAT_SOC}/drivers/mcdi/mt_cpu_pm_cpc.c \
Roger Ludf600252021-01-04 00:00:12 +0800[diff] [blame]80 ${MTK_PLAT_SOC}/drivers/mcdi/mt_lp_irqremain.c \
James Liao271d9492020-06-15 16:41:03 +0800[diff] [blame]81 ${MTK_PLAT_SOC}/drivers/mcdi/mt_mcdi.c \
elly.chiang8709c932020-08-25 22:31:14 +0800[diff] [blame]82 ${MTK_PLAT_SOC}/drivers/ptp3/mtk_ptp3_main.c \
Yidi Lin46946032021-03-26 15:53:20 +0800[diff] [blame]83 ${MTK_PLAT_SOC}/drivers/spmc/mtspmc.c
Nina Wuf85f37d2020-04-17 17:14:23 +0800[diff] [blame]84
Roger Luebb44442021-01-04 00:02:34 +0800[diff] [blame]85# Build SPM drivers
86include ${MTK_PLAT_SOC}/drivers/spm/build.mk
87
Nina Wuf85f37d2020-04-17 17:14:23 +0800[diff] [blame]88# Configs for A76 and A55
89HW_ASSISTED_COHERENCY := 1
90USE_COHERENT_MEM := 0
91CTX_INCLUDE_AARCH32_REGS := 0
92
93# indicate the reset vector address can be programmed
94PROGRAMMABLE_RESET_ADDRESS := 1
95
96COLD_BOOT_SINGLE_CPU := 1
97
98MACH_MT8192 := 1
99$(eval $(call add_define,MACH_MT8192))
100
101include lib/coreboot/coreboot.mk
102