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Jeenu Viswambharandf8f3182018-07-05 15:24:45 +01001/*
2 * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7
8#include <asm_macros.S>
Jeenu Viswambharanee6ff1b2018-02-19 12:25:53 +00009#include <assert_macros.S>
Jeenu Viswambharandf8f3182018-07-05 15:24:45 +010010#include <context.h>
11#include <ea_handle.h>
Jeenu Viswambharanb56dc2a2018-05-17 09:52:36 +010012#include <ras_arch.h>
Jeenu Viswambharandf8f3182018-07-05 15:24:45 +010013
14
15 .globl handle_lower_el_ea_esb
16 .globl enter_lower_el_sync_ea
17 .globl enter_lower_el_async_ea
18
19
20/*
21 * Function to delegate External Aborts synchronized by ESB instruction at EL3
22 * vector entry. This function assumes GP registers x0-x29 have been saved, and
23 * are available for use. It delegates the handling of the EA to platform
24 * handler, and returns only upon successfully handling the EA; otherwise
25 * panics. On return from this function, the original exception handler is
26 * expected to resume.
27 */
28func handle_lower_el_ea_esb
29 mov x0, #ERROR_EA_ESB
30 mrs x1, DISR_EL1
31 b ea_proceed
32endfunc handle_lower_el_ea_esb
33
34
35/*
36 * This function forms the tail end of Synchronous Exception entry from lower
37 * EL, and expects to handle only Synchronous External Aborts from lower EL. If
38 * any other kind of exception is detected, then this function reports unhandled
39 * exception.
40 *
41 * Since it's part of exception vector, this function doesn't expect any GP
42 * registers to have been saved. It delegates the handling of the EA to platform
43 * handler, and upon successfully handling the EA, exits EL3; otherwise panics.
44 */
45func enter_lower_el_sync_ea
46 /*
47 * Explicitly save x30 so as to free up a register and to enable
48 * branching.
49 */
50 str x30, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_LR]
51
52 mrs x30, esr_el3
53 ubfx x30, x30, #ESR_EC_SHIFT, #ESR_EC_LENGTH
54
55 /* Check for I/D aborts from lower EL */
56 cmp x30, #EC_IABORT_LOWER_EL
57 b.eq 1f
58
59 cmp x30, #EC_DABORT_LOWER_EL
60 b.ne 2f
61
621:
63 /* Test for EA bit in the instruction syndrome */
64 mrs x30, esr_el3
65 tbz x30, #ESR_ISS_EABORT_EA_BIT, 2f
66
67 /* Save GP registers */
68 bl save_gp_registers
69
70 /* Setup exception class and syndrome arguments for platform handler */
71 mov x0, #ERROR_EA_SYNC
72 mrs x1, esr_el3
73 adr x30, el3_exit
Jeenu Viswambharanb56dc2a2018-05-17 09:52:36 +010074 b delegate_sync_ea
Jeenu Viswambharandf8f3182018-07-05 15:24:45 +010075
762:
77 /* Synchronous exceptions other than the above are assumed to be EA */
78 ldr x30, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_LR]
79 no_ret report_unhandled_exception
80endfunc enter_lower_el_sync_ea
81
82
83/*
84 * This function handles SErrors from lower ELs.
85 *
86 * Since it's part of exception vector, this function doesn't expect any GP
87 * registers to have been saved. It delegates the handling of the EA to platform
88 * handler, and upon successfully handling the EA, exits EL3; otherwise panics.
89 */
90func enter_lower_el_async_ea
91 /*
92 * Explicitly save x30 so as to free up a register and to enable
93 * branching
94 */
95 str x30, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_LR]
96
97 /* Save GP registers */
98 bl save_gp_registers
99
100 /* Setup exception class and syndrome arguments for platform handler */
101 mov x0, #ERROR_EA_ASYNC
102 mrs x1, esr_el3
103 adr x30, el3_exit
Jeenu Viswambharanb56dc2a2018-05-17 09:52:36 +0100104 b delegate_async_ea
Jeenu Viswambharandf8f3182018-07-05 15:24:45 +0100105endfunc enter_lower_el_async_ea
106
107
108/*
Jeenu Viswambharanb56dc2a2018-05-17 09:52:36 +0100109 * Prelude for Synchronous External Abort handling. This function assumes that
110 * all GP registers have been saved by the caller.
111 *
112 * x0: EA reason
113 * x1: EA syndrome
114 */
115func delegate_sync_ea
116#if RAS_EXTENSION
117 /*
118 * Check for Uncontainable error type. If so, route to the platform
119 * fatal error handler rather than the generic EA one.
120 */
121 ubfx x2, x1, #EABORT_SET_SHIFT, #EABORT_SET_WIDTH
122 cmp x2, #ERROR_STATUS_SET_UC
123 b.ne 1f
124
125 /* Check fault status code */
126 ubfx x3, x1, #EABORT_DFSC_SHIFT, #EABORT_DFSC_WIDTH
127 cmp x3, #SYNC_EA_FSC
128 b.ne 1f
129
130 no_ret plat_handle_uncontainable_ea
1311:
132#endif
133
134 b ea_proceed
135endfunc delegate_sync_ea
136
137
138/*
139 * Prelude for Asynchronous External Abort handling. This function assumes that
140 * all GP registers have been saved by the caller.
141 *
142 * x0: EA reason
143 * x1: EA syndrome
144 */
145func delegate_async_ea
146#if RAS_EXTENSION
147 /*
148 * Check for Implementation Defined Syndrome. If so, skip checking
149 * Uncontainable error type from the syndrome as the format is unknown.
150 */
151 tbnz x1, #SERROR_IDS_BIT, 1f
152
153 /*
154 * Check for Uncontainable error type. If so, route to the platform
155 * fatal error handler rather than the generic EA one.
156 */
157 ubfx x2, x1, #EABORT_AET_SHIFT, #EABORT_AET_WIDTH
158 cmp x2, #ERROR_STATUS_UET_UC
159 b.ne 1f
160
161 /* Check DFSC for SError type */
162 ubfx x3, x1, #EABORT_DFSC_SHIFT, #EABORT_DFSC_WIDTH
163 cmp x3, #DFSC_SERROR
164 b.ne 1f
165
166 no_ret plat_handle_uncontainable_ea
1671:
168#endif
169
170 b ea_proceed
171endfunc delegate_async_ea
172
173
174/*
Jeenu Viswambharandf8f3182018-07-05 15:24:45 +0100175 * Delegate External Abort handling to platform's EA handler. This function
176 * assumes that all GP registers have been saved by the caller.
177 *
178 * x0: EA reason
179 * x1: EA syndrome
180 */
181func ea_proceed
182 /* Save EL3 state */
183 mrs x2, spsr_el3
184 mrs x3, elr_el3
185 stp x2, x3, [sp, #CTX_EL3STATE_OFFSET + CTX_SPSR_EL3]
186
187 /*
188 * Save ESR as handling might involve lower ELs, and returning back to
189 * EL3 from there would trample the original ESR.
190 */
191 mrs x4, scr_el3
192 mrs x5, esr_el3
193 stp x4, x5, [sp, #CTX_EL3STATE_OFFSET + CTX_SCR_EL3]
194
195 /*
196 * Setup rest of arguments, and call platform External Abort handler.
197 *
198 * x0: EA reason (already in place)
199 * x1: Exception syndrome (already in place).
200 * x2: Cookie (unused for now).
201 * x3: Context pointer.
202 * x4: Flags (security state from SCR for now).
203 */
204 mov x2, xzr
205 mov x3, sp
206 ubfx x4, x4, #0, #1
207
208 /* Switch to runtime stack */
209 ldr x5, [sp, #CTX_EL3STATE_OFFSET + CTX_RUNTIME_SP]
210 msr spsel, #0
211 mov sp, x5
212
213 mov x29, x30
Jeenu Viswambharanee6ff1b2018-02-19 12:25:53 +0000214#if ENABLE_ASSERTIONS
215 /* Stash the stack pointer */
216 mov x28, sp
217#endif
Jeenu Viswambharandf8f3182018-07-05 15:24:45 +0100218 bl plat_ea_handler
219 mov x30, x29
220
Jeenu Viswambharanee6ff1b2018-02-19 12:25:53 +0000221#if ENABLE_ASSERTIONS
222 /*
223 * Error handling flows might involve long jumps; so upon returning from
224 * the platform error handler, validate that the we've completely
225 * unwound the stack.
226 */
227 mov x27, sp
228 cmp x28, x27
229 ASM_ASSERT(eq)
230#endif
231
Jeenu Viswambharandf8f3182018-07-05 15:24:45 +0100232 /* Make SP point to context */
233 msr spsel, #1
234
235 /* Restore EL3 state */
236 ldp x1, x2, [sp, #CTX_EL3STATE_OFFSET + CTX_SPSR_EL3]
237 msr spsr_el3, x1
238 msr elr_el3, x2
239
240 /* Restore ESR_EL3 and SCR_EL3 */
241 ldp x3, x4, [sp, #CTX_EL3STATE_OFFSET + CTX_SCR_EL3]
242 msr scr_el3, x3
243 msr esr_el3, x4
244
245 ret
246endfunc ea_proceed