blob: 5e8bf2dad128009444300d7e29a19019566003ed [file] [log] [blame]
Bryan O'Donoghue73f432a2018-06-08 13:16:29 +01001/*
2 * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6#include <imx_regs.h>
7#include <imx_clock.h>
8
9static void imx7_clock_uart_init(void)
10{
11 unsigned int i;
12
13 for (i = 0; i < MXC_MAX_UART_NUM; i++)
14 imx_clock_disable_uart(i);
15}
16
Bryan O'Donoghue5ff17512018-07-27 14:53:43 +010017static void imx7_clock_wdog_init(void)
18{
19 unsigned int i;
20
21 for (i = 0; i < MXC_MAX_WDOG_NUM; i++)
22 imx_clock_disable_wdog(i);
23}
24
Bryan O'Donoghue73f432a2018-06-08 13:16:29 +010025void imx_clock_init(void)
26{
27 /*
28 * The BootROM hands off to the next stage with the internal 24 MHz XTAL
29 * crystal already clocking the main PLL, which is very handy.
30 * Here we should enable whichever peripherals are required for ATF and
31 * OPTEE.
32 *
33 * Subsequent stages in the boot process such as u-boot and Linux
34 * already have a significant and mature code-base around clocks, so our
35 * objective should be to enable what we need for ATF/OPTEE without
36 * breaking any existing upstream code in Linux and u-boot.
37 */
38
39 /* Initialize UART clocks */
40 imx7_clock_uart_init();
Bryan O'Donoghue5ff17512018-07-27 14:53:43 +010041
42 /* Watchdog clocks */
43 imx7_clock_wdog_init();
Bryan O'Donoghue73f432a2018-06-08 13:16:29 +010044}